Lines Matching refs:STRICT_FSUB

638     setOperationAction(ISD::STRICT_FSUB, MVT::f16, Promote);  in X86TargetLowering()
750 setOperationAction(ISD::STRICT_FSUB, MVT::f32, Legal); in X86TargetLowering()
751 setOperationAction(ISD::STRICT_FSUB, MVT::f64, Legal); in X86TargetLowering()
803 setOperationAction(ISD::STRICT_FSUB , MVT::f80, Legal); in X86TargetLowering()
828 setOperationAction(ISD::STRICT_FSUB, MVT::f128, LibCall); in X86TargetLowering()
994 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in X86TargetLowering()
1204 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in X86TargetLowering()
1373 setOperationAction(ISD::STRICT_FSUB, MVT::v8f32, Legal); in X86TargetLowering()
1374 setOperationAction(ISD::STRICT_FSUB, MVT::v4f64, Legal); in X86TargetLowering()
1699 setOperationAction(ISD::STRICT_FSUB, MVT::v16f32, Legal); in X86TargetLowering()
1700 setOperationAction(ISD::STRICT_FSUB, MVT::v8f64, Legal); in X86TargetLowering()
2036 setOperationAction(ISD::STRICT_FSUB, VT, Legal); in X86TargetLowering()
21235 SDValue Sub = DAG.getNode(ISD::STRICT_FSUB, dl, {MVT::f64, MVT::Other}, in LowerUINT_TO_FP_i32()
21304 return DAG.getNode(ISD::STRICT_FSUB, DL, {MVT::v2f64, MVT::Other}, in lowerUINT_TO_FP_v2i32()
21374 return DAG.getNode(ISD::STRICT_FSUB, DL, {MVT::v4f64, MVT::Other}, in lowerUINT_TO_FP_vXi32()
21456 SDValue FHigh = DAG.getNode(ISD::STRICT_FSUB, DL, {VecFloatVT, MVT::Other}, in lowerUINT_TO_FP_vXi32()
21749 Value = DAG.getNode(ISD::STRICT_FSUB, DL, { TheVT, MVT::Other}, in FP_TO_INTHelper()
33064 SDValue Sub = DAG.getNode(ISD::STRICT_FSUB, dl, {MVT::v2f64, MVT::Other}, in ReplaceNodeResults()