244     setOperationAction(ISD::SINT_TO_FP,        MVT::i8, Promote);  in X86TargetLowering()
248     setOperationAction(ISD::SINT_TO_FP,        MVT::i16, Custom);  in X86TargetLowering()
251     setOperationAction(ISD::SINT_TO_FP,        MVT::i32, Custom);  in X86TargetLowering()
255     setOperationAction(ISD::SINT_TO_FP,        MVT::i64, Custom);  in X86TargetLowering()
942     setOperationAction(ISD::SINT_TO_FP, VT, Expand);  in X86TargetLowering()
1134     setOperationAction(ISD::SINT_TO_FP,         MVT::v4i32, Custom);  in X86TargetLowering()
1136     setOperationAction(ISD::SINT_TO_FP,         MVT::v2i32, Custom);  in X86TargetLowering()
1146     setOperationAction(ISD::SINT_TO_FP,         MVT::v2f32, Custom);  in X86TargetLowering()
1289       setOperationAction(ISD::SINT_TO_FP,        MVT::v4i64, Custom);  in X86TargetLowering()
1363     setOperationAction(ISD::SINT_TO_FP,         MVT::v8i32, Custom);  in X86TargetLowering()
1690     setOperationAction(ISD::SINT_TO_FP,        MVT::v16i32, Custom);  in X86TargetLowering()
1841       for (auto Opc : {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::STRICT_SINT_TO_FP,  in X86TargetLowering()
1966       for (auto Opc : {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::STRICT_SINT_TO_FP,  in X86TargetLowering()
2095       setOperationAction(ISD::SINT_TO_FP,             MVT::v32i16, Legal);  in X86TargetLowering()
2141       setOperationAction(ISD::SINT_TO_FP,         MVT::v16i16, Legal);  in X86TargetLowering()
2143       setOperationAction(ISD::SINT_TO_FP,         MVT::v8i16,  Legal);  in X86TargetLowering()
2209       setOperationAction(ISD::SINT_TO_FP,        MVT::v2f16, Custom);  in X86TargetLowering()
2213       setOperationAction(ISD::SINT_TO_FP,        MVT::v4f16, Custom);  in X86TargetLowering()
2297     setOperationAction(ISD::SINT_TO_FP, MVT::i128, Custom);  in X86TargetLowering()
2361                        ISD::SINT_TO_FP,  in X86TargetLowering()
20670   assert((Op.getOpcode() == ISD::SINT_TO_FP ||  in LowerI64IntToFP_AVX512DQ()
20712   assert((Op.getOpcode() == ISD::SINT_TO_FP ||  in LowerI64IntToFP16()
20749     case ISD::SINT_TO_FP:  in useVectorCast()
20844       IntSize != VTSize ? X86ISD::CVTSI2P : (unsigned)ISD::SINT_TO_FP;  in lowerFPToIntToFP()
20902   bool IsSigned = Op->getOpcode() == ISD::SINT_TO_FP ||  in lowerINT_TO_FP_vXi64()
20925       SignCvts[i] = DAG.getNode(ISD::SINT_TO_FP, DL, MVT::f32, Elt);  in lowerINT_TO_FP_vXi64()
21055     return DAG.getNode(ISD::SINT_TO_FP, dl, VT, Ext);  in LowerSINT_TO_FP()
21530     return DAG.getNode(ISD::SINT_TO_FP, dl, DstVT, Src);  in LowerUINT_TO_FP()
29574   if (Op->getOpcode() == ISD::SINT_TO_FP ||  in LowerWin64_INT128_TO_FP()
32248   case ISD::SINT_TO_FP:         return LowerSINT_TO_FP(Op, DAG);  in LowerOperation()
32949   case ISD::SINT_TO_FP:  in ReplaceNodeResults()
32954     bool IsSigned = N->getOpcode() == ISD::SINT_TO_FP ||  in ReplaceNodeResults()
33015           SignCvts[i] = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, Elt);  in ReplaceNodeResults()
52652     return DAG.getNode(ISD::SINT_TO_FP, dl, VT, P);  in combineUIntToFP()
52662     return DAG.getNode(ISD::SINT_TO_FP, SDLoc(N), VT, Op0);  in combineUIntToFP()
52699     return DAG.getNode(ISD::SINT_TO_FP, dl, VT, P);  in combineSIntToFP()
52713     return DAG.getNode(ISD::SINT_TO_FP, dl, VT, P);  in combineSIntToFP()
52732         return DAG.getNode(ISD::SINT_TO_FP, dl, VT, Trunc);  in combineSIntToFP()
54500       if (InOpcode == ISD::SINT_TO_FP &&  in combineEXTRACT_SUBVECTOR()
55068   case ISD::SINT_TO_FP:  in PerformDAGCombine()