Lines Matching refs:SExtVT
31249 MVT SExtVT = SrcVT == MVT::v16i1 ? MVT::v16i8 : MVT::v32i8; in LowerBITCAST() local
31251 SDValue V = DAG.getSExtOrTrunc(Src, DL, SExtVT); in LowerBITCAST()
42247 static SDValue signExtendBitcastSrcVector(SelectionDAG &DAG, EVT SExtVT, in signExtendBitcastSrcVector() argument
42252 return DAG.getNode(ISD::SIGN_EXTEND, DL, SExtVT, Src); in signExtendBitcastSrcVector()
42257 Src.getOpcode(), DL, SExtVT, in signExtendBitcastSrcVector()
42258 signExtendBitcastSrcVector(DAG, SExtVT, Src.getOperand(0), DL), in signExtendBitcastSrcVector()
42259 signExtendBitcastSrcVector(DAG, SExtVT, Src.getOperand(1), DL)); in signExtendBitcastSrcVector()
42323 MVT SExtVT; in combineBitcastvxi1() local
42329 SExtVT = MVT::v2i64; in combineBitcastvxi1()
42332 SExtVT = MVT::v4i32; in combineBitcastvxi1()
42337 SExtVT = MVT::v4i64; in combineBitcastvxi1()
42342 SExtVT = MVT::v8i16; in combineBitcastvxi1()
42350 SExtVT = MVT::v8i32; in combineBitcastvxi1()
42355 SExtVT = MVT::v16i8; in combineBitcastvxi1()
42362 SExtVT = MVT::v32i8; in combineBitcastvxi1()
42370 SExtVT = MVT::v64i8; in combineBitcastvxi1()
42375 SExtVT = MVT::v64i8; in combineBitcastvxi1()
42381 SDValue V = PropagateSExt ? signExtendBitcastSrcVector(DAG, SExtVT, Src, DL) in combineBitcastvxi1()
42382 : DAG.getNode(ISD::SIGN_EXTEND, DL, SExtVT, Src); in combineBitcastvxi1()
42384 if (SExtVT == MVT::v16i8 || SExtVT == MVT::v32i8 || SExtVT == MVT::v64i8) { in combineBitcastvxi1()
42387 if (SExtVT == MVT::v8i16) in combineBitcastvxi1()