Lines Matching refs:SCALAR_TO_VECTOR
1087 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom); in X86TargetLowering()
1536 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom); in X86TargetLowering()
1876 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom); in X86TargetLowering()
2094 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v32f16, Custom); in X86TargetLowering()
2139 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8f16, Legal); in X86TargetLowering()
2140 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16f16, Custom); in X86TargetLowering()
2326 ISD::SCALAR_TO_VECTOR, in X86TargetLowering()
3167 ValToCopy = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, in LowerReturn()
3406 return DAG.getNode(ISD::SCALAR_TO_VECTOR, Dl, MVT::v1i1, ValReturned); in lowerRegToMasks()
3753 ? DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VA.getValVT(), Val) in LowerMemArgument()
4516 Arg = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Arg); in LowerCall()
7387 Op.getOperand(0).getOpcode() == ISD::SCALAR_TO_VECTOR && in getTargetConstantBitsFromNode()
8084 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR && in getTargetShuffleAndZeroables()
8354 case ISD::SCALAR_TO_VECTOR: in getFauxShuffleMask()
8358 SDValue Scl = N.getOperand(Opcode == ISD::SCALAR_TO_VECTOR ? 0 : 1); in getFauxShuffleMask()
8361 if (Opcode != ISD::SCALAR_TO_VECTOR) { in getFauxShuffleMask()
8413 if (Opcode == ISD::SCALAR_TO_VECTOR) { in getFauxShuffleMask()
8804 if (Opcode == ISD::SCALAR_TO_VECTOR) in getShuffleScalarElt()
8844 V = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32, V); in LowerBuildVectorAsInsert()
8909 V = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32, Elt); in LowerBuildVectorv16i8()
9163 case ISD::SCALAR_TO_VECTOR: in findEltLoadSrc()
11177 SDValue S2V = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, VarElt); in LowerBUILD_VECTOR()
11192 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); in LowerBUILD_VECTOR()
11200 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); in LowerBUILD_VECTOR()
11211 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, ShufVT, Item); in LowerBUILD_VECTOR()
11223 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, in LowerBUILD_VECTOR()
11237 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); in LowerBUILD_VECTOR()
11319 SDValue V2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, in LowerBUILD_VECTOR()
11350 Ops[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(i)); in LowerBUILD_VECTOR()
11392 Result = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(0)); in LowerBUILD_VECTOR()
11410 Ops[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(i)); in LowerBUILD_VECTOR()
14180 (Idx == 0 && V.getOpcode() == ISD::SCALAR_TO_VECTOR)) { in getScalarValueForVectorElement()
14254 V2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, ExtVT, V2S); in lowerShuffleAsElementInsertion()
14352 if ((V0Opc != ISD::SCALAR_TO_VECTOR || V0BroadcastIdx != 0) && in lowerShuffleAsTruncBroadcast()
14539 (V.getOpcode() == ISD::SCALAR_TO_VECTOR && BroadcastIdx == 0))) { in lowerShuffleAsBroadcast()
14611 V = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v2f64, V); in lowerShuffleAsBroadcast()
14932 DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v2f64, V1S)); in lowerV2F64Shuffle()
19893 SDValue EltInVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v1i1, Elt); in InsertBitToMaskVector()
19985 SDValue N1Vec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, N1); in LowerINSERT_VECTOR_ELT()
20028 N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, N1); in LowerINSERT_VECTOR_ELT()
20037 N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, ShufVT, N1); in LowerINSERT_VECTOR_ELT()
20082 N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4f32, N1); in LowerINSERT_VECTOR_ELT()
20087 N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4f32, N1); in LowerINSERT_VECTOR_ELT()
20118 Op = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT128, Op.getOperand(0)); in LowerSCALAR_TO_VECTOR()
20133 OpVT, DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32, AnyExt)); in LowerSCALAR_TO_VECTOR()
20693 SDValue InVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VecInVT, Src); in LowerI64IntToFP_AVX512DQ()
20730 SDValue InVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Src); in LowerI64IntToFP16()
20854 SDValue VecX = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecSrcVT, X); in lowerFPToIntToFP()
21178 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Op.getOperand(0)); in LowerUINT_TO_FP_i64()
21216 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32, Op.getOperand(OpNo)); in LowerUINT_TO_FP_i32()
21226 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f64, Bias))); in LowerUINT_TO_FP_i32()
22575 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, SrcVecVT, Src)); in LowerFP_TO_INT()
22578 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, SrcVecVT, in LowerFP_TO_INT()
22990 Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v4f32, In); in LowerFP_ROUND()
23054 Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4f32, Src); in LowerFP_TO_FP16()
23241 Operand = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LogicVT, Operand); in LowerFABSorFNEG()
23292 Sign = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LogicVT, Sign); in LowerFCOPYSIGN()
23306 Mag = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LogicVT, Mag); in LowerFCOPYSIGN()
23327 SDValue Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, N0); in LowerFGETSIGN()
23873 Op = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v8f16, Op); in getSqrtEstimate()
23924 Op = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v8f16, Op); in getRecipEstimate()
25089 SDValue VOp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Op1); in LowerSELECT()
25090 SDValue VOp2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Op2); in LowerSELECT()
25091 SDValue VCmp = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Cmp); in LowerSELECT()
25109 SDValue Cmp = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v1i1, Cond); in LowerSELECT()
26250 ShAmt.getOpcode() == ISD::SCALAR_TO_VECTOR) { in getTargetVShiftNode()
26254 ShAmt = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32, ShAmt); in getTargetVShiftNode()
26999 ShAmt = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32, ShAmt); in LowerINTRINSIC_WO_CHAIN()
31276 Src = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Src); in LowerBITCAST()
31466 SDValue Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, In); in LowerBITREVERSE_XOP()
31743 SDValue SclToVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, in LowerATOMIC_STORE()
32236 case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, Subtarget,DAG); in LowerOperation()
32413 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, N->getOperand(0)); in ReplaceNodeResults()
33409 Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, Res); in ReplaceNodeResults()
37264 (V1.getOpcode() == ISD::SCALAR_TO_VECTOR && in matchUnaryShuffle()
38165 V1.getOpcode() == ISD::SCALAR_TO_VECTOR && in combineX86ShuffleChain()
38218 SrcV2.getOpcode() == ISD::SCALAR_TO_VECTOR) { in combineX86ShuffleChain()
38230 V2.getOpcode() == ISD::SCALAR_TO_VECTOR && in combineX86ShuffleChain()
39919 if (Src.getOpcode() == ISD::SCALAR_TO_VECTOR) in combineTargetShuffle()
40112 if (N0.hasOneUse() && N0.getOpcode() == ISD::SCALAR_TO_VECTOR && in combineTargetShuffle()
40120 SDValue SclVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Trunc); in combineTargetShuffle()
40129 if (N0.getOpcode() == ISD::SCALAR_TO_VECTOR) { in combineTargetShuffle()
40322 SDValue SclVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VT, Scl); in combineTargetShuffle()
40426 DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VT, in combineTargetShuffle()
42485 V = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v4f32, V); in createMMXBuildVector()
43457 if (SrcBC.getOpcode() == ISD::SCALAR_TO_VECTOR && VT.isInteger() && in combineExtractWithShuffle()
44038 Use->getOpcode() == ISD::SCALAR_TO_VECTOR; in combineExtractVectorElt()
44105 Vec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, BroadcastVT, N00); in combineToExtendBoolVectorInReg()
44121 Vec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, BroadcastVT, N00); in combineToExtendBoolVectorInReg()
44130 Vec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VT, Scl); in combineToExtendBoolVectorInReg()
47303 SDValue Vector64 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v2f64, in combineCompareEqual()
47527 SDValue Vec00 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N00); in convertIntLogicToFPLogic()
47528 SDValue Vec01 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N01); in convertIntLogicToFPLogic()
47529 SDValue Vec10 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N10); in convertIntLogicToFPLogic()
47530 SDValue Vec11 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N11); in convertIntLogicToFPLogic()
49371 StoredVal.getOpcode() == ISD::SCALAR_TO_VECTOR && in combineStore()
53866 if (Op0.getOpcode() == ISD::SCALAR_TO_VECTOR && in combineConcatVectorOps()
54584 return DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v1i1, in combineScalarToVector()
54613 VT, DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v4i32, in combineScalarToVector()
54817 SDValue Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4f32, in combineFP16_TO_FP()
55029 case ISD::SCALAR_TO_VECTOR: in PerformDAGCombine()