Lines Matching refs:ResVT
5783 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() argument
5785 if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT)) in isExtractSubvectorCheap()
5790 if (ResVT.getVectorElementType() == MVT::i1) in isExtractSubvectorCheap()
5791 return Index == 0 || ((ResVT.getSizeInBits() == SrcVT.getSizeInBits()*2) && in isExtractSubvectorCheap()
5792 (Index == ResVT.getVectorNumElements())); in isExtractSubvectorCheap()
5794 return (Index % ResVT.getVectorNumElements()) == 0; in isExtractSubvectorCheap()
11440 MVT ResVT = Op.getSimpleValueType(); in LowerAVXCONCAT_VECTORS() local
11442 assert((ResVT.is256BitVector() || in LowerAVXCONCAT_VECTORS()
11443 ResVT.is512BitVector()) && "Value type must be 256-/512-bit wide"); in LowerAVXCONCAT_VECTORS()
11464 MVT HalfVT = ResVT.getHalfNumVectorElementsVT(); in LowerAVXCONCAT_VECTORS()
11470 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); in LowerAVXCONCAT_VECTORS()
11474 SDValue Vec = NumZero ? getZeroVector(ResVT, Subtarget, DAG, dl) in LowerAVXCONCAT_VECTORS()
11475 : DAG.getUNDEF(ResVT); in LowerAVXCONCAT_VECTORS()
11483 Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Vec, in LowerAVXCONCAT_VECTORS()
11499 MVT ResVT = Op.getSimpleValueType(); in LowerCONCAT_VECTORSvXi1() local
11518 unsigned NumElems = ResVT.getVectorNumElements(); in LowerCONCAT_VECTORSvXi1()
11525 MVT ShiftVT = ResVT; in LowerCONCAT_VECTORSvXi1()
11536 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResVT, Op, in LowerCONCAT_VECTORSvXi1()
11542 SDValue Vec = Zeros ? DAG.getConstant(0, dl, ResVT) : DAG.getUNDEF(ResVT); in LowerCONCAT_VECTORSvXi1()
11548 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Vec, SubVec, in LowerCONCAT_VECTORSvXi1()
11553 MVT HalfVT = ResVT.getHalfNumVectorElementsVT(); in LowerCONCAT_VECTORSvXi1()
11559 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); in LowerCONCAT_VECTORSvXi1()
11564 if (ResVT.getVectorNumElements() >= 16) in LowerCONCAT_VECTORSvXi1()
11567 SDValue Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, in LowerCONCAT_VECTORSvXi1()
11568 DAG.getUNDEF(ResVT), Op.getOperand(0), in LowerCONCAT_VECTORSvXi1()
11570 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Vec, Op.getOperand(1), in LowerCONCAT_VECTORSvXi1()
21719 EVT ResVT = getSetCCResultType(DAG.getDataLayout(), in FP_TO_INTHelper() local
21723 Cmp = DAG.getSetCC(DL, ResVT, Value, ThreshVal, ISD::SETGE, Chain, in FP_TO_INTHelper()
21727 Cmp = DAG.getSetCC(DL, ResVT, Value, ThreshVal, ISD::SETGE); in FP_TO_INTHelper()
22342 MVT ResVT = MVT::v4i32; in LowerFP_TO_INT() local
22353 ResVT = MVT::v8i32; in LowerFP_TO_INT()
22365 Res = DAG.getNode(Opc, dl, {ResVT, MVT::Other}, {Chain, Src}); in LowerFP_TO_INT()
22368 Res = DAG.getNode(Opc, dl, ResVT, Src); in LowerFP_TO_INT()
22383 MVT ResVT = VT; in LowerFP_TO_INT() local
22386 ResVT = EleVT == MVT::i32 ? MVT::v4i32 : MVT::v8i16; in LowerFP_TO_INT()
22399 dl, {ResVT, MVT::Other}, {Chain, Src}); in LowerFP_TO_INT()
22403 ResVT, Src); in LowerFP_TO_INT()
22408 ResVT = MVT::getVectorVT(EleVT, 8); in LowerFP_TO_INT()
22409 Res = DAG.getNode(ISD::TRUNCATE, dl, ResVT, Res); in LowerFP_TO_INT()
22412 if (ResVT != VT) in LowerFP_TO_INT()
22454 MVT ResVT = SrcVT == MVT::v4f64 ? MVT::v8i32 : MVT::v16i32; in LowerFP_TO_INT() local
22464 Res = DAG.getNode(ISD::STRICT_FP_TO_UINT, dl, {ResVT, MVT::Other}, in LowerFP_TO_INT()
22468 Res = DAG.getNode(ISD::FP_TO_UINT, dl, ResVT, Src); in LowerFP_TO_INT()
32540 EVT ResVT = getTypeToTransformTo(*DAG.getContext(), VT); in ReplaceNodeResults() local
32541 SDValue N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Ops0); in ReplaceNodeResults()
32542 SDValue N1 = DAG.getConstant(SplatVal, dl, ResVT); in ReplaceNodeResults()
32543 SDValue Res = DAG.getNode(N->getOpcode(), dl, ResVT, N0, N1); in ReplaceNodeResults()
32734 EVT ResVT = EleVT == MVT::i32 ? MVT::v4i32 : MVT::v8i16; in ReplaceNodeResults() local
32748 DAG.getNode(Opc, dl, {ResVT, MVT::Other}, {N->getOperand(0), Src}); in ReplaceNodeResults()
32752 Res = DAG.getNode(Opc, dl, ResVT, Src); in ReplaceNodeResults()
43311 EVT ResVT = in combineVPDPBUSDPattern() local
43314 DP = DAG.getBitcast(ResVT, DP); in combineVPDPBUSDPattern()
43386 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), ExtractVT, in combineBasicSADPattern() local
43388 SAD = DAG.getBitcast(ResVT, SAD); in combineBasicSADPattern()
46089 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts / 2); in reduceVMULWidth() local
46106 ResLo = DAG.getBitcast(ResVT, ResLo); in reduceVMULWidth()
46114 ResHi = DAG.getBitcast(ResVT, ResHi); in reduceVMULWidth()
46309 MVT ResVT = MVT::getVectorVT(MVT::i32, Ops[0].getValueSizeInBits() / 32); in combineMulToPMADDWD() local
46311 return DAG.getNode(X86ISD::VPMADDWD, DL, ResVT, in combineMulToPMADDWD()
50528 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i16, in detectPMADDUBSW() local
50530 return DAG.getNode(X86ISD::VPMADDUBSW, DL, ResVT, Ops[0], Ops[1]); in detectPMADDUBSW()
53378 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, in matchPMADDWD() local
53380 return DAG.getNode(X86ISD::VPMADDWD, DL, ResVT, Ops[0], Ops[1]); in matchPMADDWD()
53503 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, in matchPMADDWD_2() local
53505 return DAG.getNode(X86ISD::VPMADDWD, DL, ResVT, Ops[0], Ops[1]); in matchPMADDWD_2()