29071     SDValue RLo = DAG.getNode(ISD::MUL, dl, ExVT, ALo, BLo);  in LowerMUL()  local
29073     return getPack(DAG, Subtarget, dl, VT, RLo, RHi);  in LowerMUL()
29223   SDValue RLo = DAG.getNode(MulOpc, dl, ExVT, ALo, BLo);  in LowervXi8MulWithUNPCK()  local
29227     *Low = getPack(DAG, Subtarget, dl, VT, RLo, RHi);  in LowervXi8MulWithUNPCK()
29229   return getPack(DAG, Subtarget, dl, VT, RLo, RHi, /*PackHiHalf*/ true);  in LowervXi8MulWithUNPCK()
30255       SDValue RLo = getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), R);  in LowerShift()  local
30259       RLo = DAG.getBitcast(ExtVT, RLo);  in LowerShift()
30263       SDValue MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 4, DAG);  in LowerShift()
30265       RLo = SignBitSelect(ExtVT, ALo, MLo, RLo);  in LowerShift()
30273       MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 2, DAG);  in LowerShift()
30275       RLo = SignBitSelect(ExtVT, ALo, MLo, RLo);  in LowerShift()
30283       MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 1, DAG);  in LowerShift()
30285       RLo = SignBitSelect(ExtVT, ALo, MLo, RLo);  in LowerShift()
30290       RLo = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExtVT, RLo, 8, DAG);  in LowerShift()
30292       return DAG.getNode(X86ISD::PACKUS, dl, VT, RLo, RHi);  in LowerShift()
30301     SDValue RLo = getUnpackl(DAG, dl, VT, Z, R);  in LowerShift()  local
30305     RLo = DAG.getBitcast(ExtVT, RLo);  in LowerShift()
30307     SDValue Lo = DAG.getNode(Opc, dl, ExtVT, RLo, ALo);  in LowerShift()
30500       SDValue RLo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, Op1, Op0));  in LowerFunnelShift()  local
30504       SDValue Lo = DAG.getNode(ShiftOpc, DL, ExtVT, RLo, ALo);  in LowerFunnelShift()
30707       SDValue RLo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, R, R));  in LowerRotate()  local
30711       SDValue Lo = DAG.getNode(ShiftOpc, DL, ExtVT, RLo, ALo);  in LowerRotate()