5304   case X86ISD::PSHUFLW:  in isTargetShuffle()
7753   case X86ISD::PSHUFLW:  in getTargetShuffleMask()
13953     unsigned OddEvenOp = (Offset & 1) ? X86ISD::PSHUFLW : X86ISD::PSHUFHW;  in lowerShuffleAsSpecificZeroOrAnyExtend()
15382     return DAG.getNode(X86ISD::PSHUFLW, DL, VT, V,  in lowerV8I16GeneralSingleInputShuffle()
15460         return ShuffleDWordPairs(PSHUFHalfMask, PSHUFDMask, X86ISD::PSHUFLW);  in lowerV8I16GeneralSingleInputShuffle()
15566               FixIdx < 4 ? X86ISD::PSHUFLW : X86ISD::PSHUFHW, DL,  in lowerV8I16GeneralSingleInputShuffle()
15827     V = DAG.getNode(X86ISD::PSHUFLW, DL, VT, V,  in lowerV8I16GeneralSingleInputShuffle()
15847     V = DAG.getNode(X86ISD::PSHUFLW, DL, VT, V,  in lowerV8I16GeneralSingleInputShuffle()
30093         Amt0 = DAG.getNode(X86ISD::PSHUFLW, dl, MVT::v8i16, Amt01, Msk02);  in LowerShift()
30094         Amt1 = DAG.getNode(X86ISD::PSHUFLW, dl, MVT::v8i16, Amt01, Msk13);  in LowerShift()
30095         Amt2 = DAG.getNode(X86ISD::PSHUFLW, dl, MVT::v8i16, Amt23, Msk02);  in LowerShift()
30096         Amt3 = DAG.getNode(X86ISD::PSHUFLW, dl, MVT::v8i16, Amt23, Msk13);  in LowerShift()
33614   NODE_NAME_CASE(PSHUFLW)  in getTargetNodeName()
37478         Shuffle = X86ISD::PSHUFLW;  in matchUnaryPermuteShuffle()
39460   case X86ISD::PSHUFLW:  in getPSHUFShuffleMask()
39504     case X86ISD::PSHUFLW:  in combineRedundantDWordShuffle()
39534           V.getOpcode() == X86ISD::UNPCKL ? X86ISD::PSHUFLW : X86ISD::PSHUFHW;  in combineRedundantDWordShuffle()
39545         case X86ISD::PSHUFLW:  in combineRedundantDWordShuffle()
39593     case X86ISD::PSHUFLW:  in combineRedundantDWordShuffle()
39703   case X86ISD::PSHUFLW:  in canonicalizeShuffleWithBinOps()
40294   case X86ISD::PSHUFLW:  in combineTargetShuffle()
40449   case X86ISD::PSHUFLW:  in combineTargetShuffle()
40458       int DOffset = N.getOpcode() == X86ISD::PSHUFLW ? 0 : 2;  in combineTargetShuffle()
40472         (V.getOpcode() == X86ISD::PSHUFLW ||  in combineTargetShuffle()
40480         int NOffset = N.getOpcode() == X86ISD::PSHUFLW ? 0 : 4;  in combineTargetShuffle()
40481         int VOffset = V.getOpcode() == X86ISD::PSHUFLW ? 0 : 4;  in combineTargetShuffle()
41481     case X86ISD::PSHUFLW:  in SimplifyDemandedVectorEltsForTargetNode()
53961     case X86ISD::PSHUFLW:  in combineConcatVectorOps()
55146   case X86ISD::PSHUFLW:  in PerformDAGCombine()