Lines Matching refs:OpVT
6650 EVT OpVT = Op.getValueType(); in SplitOpsAndApply() local
6651 unsigned NumSubElts = OpVT.getVectorNumElements() / NumSubs; in SplitOpsAndApply()
6652 unsigned SizeSub = OpVT.getSizeInBits() / NumSubs; in SplitOpsAndApply()
6670 auto MakeBroadcastOp = [&](SDValue Op, MVT OpVT, MVT DstVT) { in getAVX512Node() argument
6671 unsigned OpEltSizeInBits = OpVT.getScalarSizeInBits(); in getAVX512Node()
6674 if (!OpVT.isInteger() || OpEltSizeInBits < 32 || in getAVX512Node()
6678 if (OpVT == DstVT && Op.getOpcode() != ISD::BITCAST) in getAVX512Node()
6701 MVT OpVT = Op.getSimpleValueType(); in getAVX512Node() local
6703 if (!OpVT.isVector()) in getAVX512Node()
6705 assert(OpVT == VT && "Vector type mismatch"); in getAVX512Node()
6707 if (SDValue BroadcastOp = MakeBroadcastOp(Op, OpVT, DstVT)) { in getAVX512Node()
6742 MVT OpVT = Op.getSimpleValueType(); in insert1BitVector() local
6743 unsigned NumElems = OpVT.getVectorNumElements(); in insert1BitVector()
6747 MVT WideOpVT = OpVT; in insert1BitVector()
6758 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, Op, ZeroIdx); in insert1BitVector()
6781 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, Op, ZeroIdx); in insert1BitVector()
6791 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, SubVec, ZeroIdx); in insert1BitVector()
6811 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, SubVec, ZeroIdx); in insert1BitVector()
6835 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, Op, ZeroIdx); in insert1BitVector()
6862 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, Op, ZeroIdx); in insert1BitVector()
6890 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OpVT, SubVec, ZeroIdx); in insert1BitVector()
7077 MVT OpVT = LHS.getSimpleValueType(); in getPack() local
7080 assert(OpVT == RHS.getSimpleValueType() && in getPack()
7081 VT.getSizeInBits() == OpVT.getSizeInBits() && in getPack()
7082 (EltSizeInBits * 2) == OpVT.getScalarSizeInBits() && in getPack()
7118 LHS = DAG.getNode(X86ISD::VSRLI, dl, OpVT, LHS, Amt); in getPack()
7119 RHS = DAG.getNode(X86ISD::VSRLI, dl, OpVT, RHS, Amt); in getPack()
7121 SDValue Mask = DAG.getConstant((1ULL << EltSizeInBits) - 1, dl, OpVT); in getPack()
7122 LHS = DAG.getNode(ISD::AND, dl, OpVT, LHS, Mask); in getPack()
7123 RHS = DAG.getNode(ISD::AND, dl, OpVT, RHS, Mask); in getPack()
7129 LHS = DAG.getNode(X86ISD::VSHLI, dl, OpVT, LHS, Amt); in getPack()
7130 RHS = DAG.getNode(X86ISD::VSHLI, dl, OpVT, RHS, Amt); in getPack()
7132 LHS = DAG.getNode(X86ISD::VSRAI, dl, OpVT, LHS, Amt); in getPack()
7133 RHS = DAG.getNode(X86ISD::VSRAI, dl, OpVT, RHS, Amt); in getPack()
19234 EVT OpVT = Op0.getValueType(); in lower1BitShuffle() local
19236 DL, VT, DAG.getVectorShuffle(OpVT, DL, Op0, DAG.getUNDEF(OpVT), Mask), in lower1BitShuffle()
19237 DAG.getVectorShuffle(OpVT, DL, Op1, DAG.getUNDEF(OpVT), Mask), CC); in lower1BitShuffle()
20103 MVT OpVT = Op.getSimpleValueType(); in LowerSCALAR_TO_VECTOR() local
20108 return getZeroVector(OpVT, Subtarget, DAG, dl); in LowerSCALAR_TO_VECTOR()
20112 if (!OpVT.is128BitVector()) { in LowerSCALAR_TO_VECTOR()
20114 unsigned SizeFactor = OpVT.getSizeInBits() / 128; in LowerSCALAR_TO_VECTOR()
20115 MVT VT128 = MVT::getVectorVT(OpVT.getVectorElementType(), in LowerSCALAR_TO_VECTOR()
20116 OpVT.getVectorNumElements() / SizeFactor); in LowerSCALAR_TO_VECTOR()
20121 return insert128BitVector(DAG.getUNDEF(OpVT), Op, 0, DAG, dl); in LowerSCALAR_TO_VECTOR()
20123 assert(OpVT.is128BitVector() && OpVT.isInteger() && OpVT != MVT::v2i64 && in LowerSCALAR_TO_VECTOR()
20128 if (OpVT == MVT::v4i32 || (OpVT == MVT::v8i16 && Subtarget.hasFP16())) in LowerSCALAR_TO_VECTOR()
20133 OpVT, DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32, AnyExt)); in LowerSCALAR_TO_VECTOR()
23321 MVT OpVT = N0.getSimpleValueType(); in LowerFGETSIGN() local
23322 assert((OpVT == MVT::f32 || OpVT == MVT::f64) && in LowerFGETSIGN()
23326 MVT VecVT = (OpVT == MVT::f32 ? MVT::v4f32 : MVT::v2f64); in LowerFGETSIGN()
28801 MVT OpVT = VT; in LowerCTLZ() local
28812 OpVT = MVT::i32; in LowerCTLZ()
28813 Op = DAG.getNode(ISD::ZERO_EXTEND, dl, OpVT, Op); in LowerCTLZ()
28817 SDVTList VTs = DAG.getVTList(OpVT, MVT::i32); in LowerCTLZ()
28822 SDValue Ops[] = {Op, DAG.getConstant(NumBits + NumBits - 1, dl, OpVT), in LowerCTLZ()
28825 Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, Ops); in LowerCTLZ()
28829 Op = DAG.getNode(ISD::XOR, dl, OpVT, Op, in LowerCTLZ()
28830 DAG.getConstant(NumBits - 1, dl, OpVT)); in LowerCTLZ()
39725 EVT OpVT = N0.getValueType(); in canonicalizeShuffleWithBinOps() local
39727 DAG.getNode(SrcOpcode, DL, OpVT, in canonicalizeShuffleWithBinOps()
39728 DAG.getBitcast(OpVT, LHS), in canonicalizeShuffleWithBinOps()
39729 DAG.getBitcast(OpVT, RHS))); in canonicalizeShuffleWithBinOps()
39780 EVT OpVT = N0.getValueType(); in canonicalizeShuffleWithBinOps() local
39782 DAG.getNode(SrcOpcode, DL, OpVT, in canonicalizeShuffleWithBinOps()
39783 DAG.getBitcast(OpVT, LHS), in canonicalizeShuffleWithBinOps()
39784 DAG.getBitcast(OpVT, RHS))); in canonicalizeShuffleWithBinOps()
43610 EVT OpVT = Vec.getOperand(0).getValueType().getScalarType(); in scalarizeExtEltFP() local
43611 if (OpVT != MVT::f32 && OpVT != MVT::f64) in scalarizeExtEltFP()
43616 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP()
43618 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP()
45403 EVT OpVT = Op0.getValueType(); in combinePTESTCC() local
45438 DAG.getBitcast(OpVT, NotOp0), Op1); in combinePTESTCC()
45447 DAG.getBitcast(OpVT, NotOp1), Op0); in combinePTESTCC()
45459 DAG.getBitcast(OpVT, BC.getOperand(0)), in combinePTESTCC()
45460 DAG.getBitcast(OpVT, BC.getOperand(1))); in combinePTESTCC()
45467 DAG.getBitcast(OpVT, BC.getOperand(0)), in combinePTESTCC()
45468 DAG.getBitcast(OpVT, BC.getOperand(1))); in combinePTESTCC()
45511 if (CC == X86::COND_E && OpVT.is128BitVector() && Subtarget.hasAVX()) { in combinePTESTCC()
46310 MVT OpVT = MVT::getVectorVT(MVT::i16, Ops[0].getValueSizeInBits() / 16); in combineMulToPMADDWD() local
46312 DAG.getBitcast(OpVT, Ops[0]), in combineMulToPMADDWD()
46313 DAG.getBitcast(OpVT, Ops[1])); in combineMulToPMADDWD()
48126 MVT OpVT = in canonicalizeBitSelect() local
48128 SDValue A = DAG.getBitcast(OpVT, N0.getOperand(1)); in canonicalizeBitSelect()
48129 SDValue B = DAG.getBitcast(OpVT, N0.getOperand(0)); in canonicalizeBitSelect()
48130 SDValue C = DAG.getBitcast(OpVT, N1.getOperand(0)); in canonicalizeBitSelect()
48132 SDValue Res = getAVX512Node(X86ISD::VPTERNLOG, DL, OpVT, {A, B, C, Imm}, in canonicalizeBitSelect()
51934 EVT OpVT = X.getValueType(); in combineVectorSizedSetCCEquality() local
51935 unsigned OpSize = OpVT.getSizeInBits(); in combineVectorSizedSetCCEquality()
51936 if (!OpVT.isScalarInteger() || OpSize < 128) in combineVectorSizedSetCCEquality()
52081 EVT OpVT = LHS.getValueType(); in combineSetCC() local
52096 if (OpVT.isScalarInteger()) { in combineSetCC()
52102 return DAG.getNode(ISD::AND, DL, OpVT, DAG.getNOT(DL, N1, OpVT), in combineSetCC()
52105 return DAG.getNode(ISD::AND, DL, OpVT, DAG.getNOT(DL, N1, OpVT), in combineSetCC()
52111 return DAG.getSetCC(DL, VT, AndN, DAG.getConstant(0, DL, OpVT), CC); in combineSetCC()
52113 return DAG.getSetCC(DL, VT, AndN, DAG.getConstant(0, DL, OpVT), CC); in combineSetCC()
52120 return DAG.getNode(ISD::AND, DL, OpVT, N1, in combineSetCC()
52121 DAG.getNOT(DL, N0.getOperand(1), OpVT)); in combineSetCC()
52123 return DAG.getNode(ISD::AND, DL, OpVT, N1, in combineSetCC()
52124 DAG.getNOT(DL, N0.getOperand(0), OpVT)); in combineSetCC()
52129 return DAG.getSetCC(DL, VT, AndN, DAG.getConstant(0, DL, OpVT), CC); in combineSetCC()
52131 return DAG.getSetCC(DL, VT, AndN, DAG.getConstant(0, DL, OpVT), CC); in combineSetCC()
52142 OpVT.getScalarSizeInBits()); in combineSetCC()
52193 (OpVT.getVectorElementType() == MVT::i8 || in combineSetCC()
52194 OpVT.getVectorElementType() == MVT::i16)) { in combineSetCC()
52195 SDValue Setcc = DAG.getSetCC(DL, OpVT, LHS, RHS, CC); in combineSetCC()
52210 SDVTList FNegVT = DAG.getVTList(OpVT); in combineSetCC()
53106 EVT OpVT = Op.getValueType(); in combineCMP() local
53108 APInt::getBitsSetFrom(OpVT.getSizeInBits(), VT.getSizeInBits()); in combineCMP()
53109 if (OpVT == MVT::i32 && DAG.MaskedValueIsZero(Op, UpperBits) && in combineCMP()
53112 DAG.getConstant(0, dl, OpVT)); in combineCMP()
53499 EVT OpVT = Ops[0].getValueType(); in matchPMADDWD_2() local
53500 assert(OpVT.getScalarType() == MVT::i16 && in matchPMADDWD_2()
53502 assert(OpVT == Ops[1].getValueType() && "Operands' types mismatch"); in matchPMADDWD_2()
53504 OpVT.getVectorNumElements() / 2); in matchPMADDWD_2()
53538 MVT OpVT = N0.getOperand(0).getSimpleValueType(); in combineAddOfPMADDWD() local
53539 APInt DemandedBits = APInt::getAllOnes(OpVT.getScalarSizeInBits()); in combineAddOfPMADDWD()
53562 DAG.getVectorShuffle(OpVT, DL, N0.getOperand(0), N1.getOperand(0), Mask); in combineAddOfPMADDWD()
53564 DAG.getVectorShuffle(OpVT, DL, N0.getOperand(1), N1.getOperand(1), Mask); in combineAddOfPMADDWD()
53996 MVT OpVT = Op0.getSimpleValueType(); in combineConcatVectorOps() local
53997 int NumSrcElts = OpVT.getVectorNumElements(); in combineConcatVectorOps()
54002 if (!getTargetShuffleMask(Ops[i].getNode(), OpVT, false, SubOps, in combineConcatVectorOps()
54189 MVT OpVT = N->getSimpleValueType(0); in combineINSERT_SUBVECTOR() local
54191 bool IsI1Vector = OpVT.getVectorElementType() == MVT::i1; in combineINSERT_SUBVECTOR()
54201 return DAG.getUNDEF(OpVT); in combineINSERT_SUBVECTOR()
54206 return getZeroVector(OpVT, Subtarget, DAG, dl); in combineINSERT_SUBVECTOR()
54214 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, in combineINSERT_SUBVECTOR()
54215 getZeroVector(OpVT, Subtarget, DAG, dl), in combineINSERT_SUBVECTOR()
54232 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, in combineINSERT_SUBVECTOR()
54233 getZeroVector(OpVT, Subtarget, DAG, dl), in combineINSERT_SUBVECTOR()
54245 SubVec.getOperand(0).getSimpleValueType() == OpVT && in combineINSERT_SUBVECTOR()
54250 int VecNumElts = OpVT.getVectorNumElements(); in combineINSERT_SUBVECTOR()
54260 return DAG.getVectorShuffle(OpVT, dl, Vec, SubVec.getOperand(0), Mask); in combineINSERT_SUBVECTOR()
54268 combineConcatVectorOps(dl, OpVT, SubVectorOps, DAG, DCI, Subtarget)) in combineINSERT_SUBVECTOR()
54278 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, in combineINSERT_SUBVECTOR()
54279 getZeroVector(OpVT, Subtarget, DAG, dl), in combineINSERT_SUBVECTOR()
54285 return DAG.getNode(X86ISD::VBROADCAST, dl, OpVT, SubVec.getOperand(0)); in combineINSERT_SUBVECTOR()
54292 SDVTList Tys = DAG.getVTList(OpVT, MVT::Other); in combineINSERT_SUBVECTOR()
54304 if (IdxVal == (OpVT.getVectorNumElements() / 2) && SubVec.hasOneUse() && in combineINSERT_SUBVECTOR()
54311 return getBROADCAST_LOAD(X86ISD::SUBV_BROADCAST_LOAD, dl, OpVT, SubVecVT, in combineINSERT_SUBVECTOR()