9999   case X86ISD::FHSUB:  in isHorizOp()
10411         case ISD::FSUB: HOpcode = X86ISD::FHSUB; break;  in isHopBuildVector()
10597       X86Opcode = X86ISD::FHSUB;  in LowerToHorizontalOp()
11804   case X86ISD::FHSUB:  in IsElementEquivalent()
23113     case ISD::FSUB: HOpcode = X86ISD::FHSUB; break;  in lowerAddSubToHorizontalOp()
33500   NODE_NAME_CASE(FHSUB)  in getTargetNodeName()
38749                   Opcode0 == X86ISD::FHSUB || Opcode0 == X86ISD::HSUB);  in canonicalizeShuffleMaskWithHorizOp()
41237   case X86ISD::FHSUB: {  in SimplifyDemandedVectorEltsForTargetNode()
41498     case X86ISD::FHSUB: {  in SimplifyDemandedVectorEltsForTargetNode()
47012           X86ISD::HSUB == N->getOpcode() || X86ISD::FHSUB == N->getOpcode()) &&  in combineVectorHADDSUB()
49862       auto HorizOpcode = IsAdd ? X86ISD::FHADD : X86ISD::FHSUB;  in combineToHorizontalAddSub()
54087     case X86ISD::FHSUB:  in combineConcatVectorOps()
55118   case X86ISD::FHSUB:       return combineVectorHADDSUB(N, DAG, DCI, Subtarget);  in PerformDAGCombine()