9998   case X86ISD::FHADD:  in isHorizOp()
10410         case ISD::FADD: HOpcode = X86ISD::FHADD; break;  in isHopBuildVector()
10594       X86Opcode = X86ISD::FHADD;  in LowerToHorizontalOp()
11803   case X86ISD::FHADD:  in IsElementEquivalent()
21195     Result = DAG.getNode(X86ISD::FHADD, dl, MVT::v2f64, Sub, Sub);  in LowerUINT_TO_FP_i64()
23112     case ISD::FADD: HOpcode = X86ISD::FHADD; break;  in lowerAddSubToHorizontalOp()
23120       (HOpcode == X86ISD::HADD || HOpcode == X86ISD::FHADD))  in lowerAddSubToHorizontalOp()
33499   NODE_NAME_CASE(FHADD)  in getTargetNodeName()
38748   bool isHoriz = (Opcode0 == X86ISD::FHADD || Opcode0 == X86ISD::HADD ||  in canonicalizeShuffleMaskWithHorizOp()
41236   case X86ISD::FHADD:  in SimplifyDemandedVectorEltsForTargetNode()
41497     case X86ISD::FHADD:  in SimplifyDemandedVectorEltsForTargetNode()
43852   unsigned HorizOpcode = Opc == ISD::ADD ? X86ISD::HADD : X86ISD::FHADD;  in combineArithReduction()
47011   assert((X86ISD::HADD == N->getOpcode() || X86ISD::FHADD == N->getOpcode() ||  in combineVectorHADDSUB()
49862       auto HorizOpcode = IsAdd ? X86ISD::FHADD : X86ISD::FHSUB;  in combineToHorizontalAddSub()
54086     case X86ISD::FHADD:  in combineConcatVectorOps()
55117   case X86ISD::FHADD:  in PerformDAGCombine()