Lines Matching refs:ExtVT
13926 MVT ExtVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits * Scale), in lowerShuffleAsSpecificZeroOrAnyExtend() local
13930 DL, ExtVT, InputV, DAG); in lowerShuffleAsSpecificZeroOrAnyExtend()
14218 MVT ExtVT = VT; in lowerShuffleAsElementInsertion() local
14251 ExtVT = MVT::getVectorVT(MVT::i32, ExtVT.getSizeInBits() / 32); in lowerShuffleAsElementInsertion()
14254 V2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, ExtVT, V2S); in lowerShuffleAsElementInsertion()
14266 assert(VT == ExtVT && "Cannot change extended type when non-zeroable!"); in lowerShuffleAsElementInsertion()
14286 return DAG.getNode(MovOpc, DL, ExtVT, V1, V2); in lowerShuffleAsElementInsertion()
14293 V2 = DAG.getNode(X86ISD::VZEXT_MOVL, DL, ExtVT, V2); in lowerShuffleAsElementInsertion()
14294 if (ExtVT != VT) in lowerShuffleAsElementInsertion()
19240 MVT ExtVT; in lower1BitShuffle() local
19245 ExtVT = MVT::v2i64; in lower1BitShuffle()
19248 ExtVT = MVT::v4i32; in lower1BitShuffle()
19253 ExtVT = Subtarget.hasVLX() ? MVT::v8i32 : MVT::v8i64; in lower1BitShuffle()
19258 ExtVT = Subtarget.canExtendTo512DQ() ? MVT::v16i32 : MVT::v16i16; in lower1BitShuffle()
19264 ExtVT = Subtarget.canExtendTo512BW() ? MVT::v32i16 : MVT::v32i8; in lower1BitShuffle()
19271 ExtVT = MVT::v64i8; in lower1BitShuffle()
19275 V1 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, V1); in lower1BitShuffle()
19276 V2 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, V2); in lower1BitShuffle()
19278 SDValue Shuffle = DAG.getVectorShuffle(ExtVT, DL, V1, V2, Mask); in lower1BitShuffle()
19283 return DAG.getSetCC(DL, VT, DAG.getConstant(0, DL, ExtVT), in lower1BitShuffle()
21887 MVT ExtVT = VT; in LowerZERO_EXTEND_Mask() local
21893 ExtVT = MVT::getVectorVT(MVT::i32, NumElts); in LowerZERO_EXTEND_Mask()
21897 MVT WideVT = ExtVT; in LowerZERO_EXTEND_Mask()
21898 if (!ExtVT.is512BitVector() && !Subtarget.hasVLX()) { in LowerZERO_EXTEND_Mask()
21899 NumElts *= 512 / ExtVT.getSizeInBits(); in LowerZERO_EXTEND_Mask()
21903 WideVT = MVT::getVectorVT(ExtVT.getVectorElementType(), in LowerZERO_EXTEND_Mask()
21913 if (VT != ExtVT) { in LowerZERO_EXTEND_Mask()
22065 MVT ExtVT = MVT::getVectorVT(MVT::i16, InVT.getSizeInBits()/16); in LowerTruncateVecI1() local
22066 In = DAG.getNode(ISD::SHL, DL, ExtVT, in LowerTruncateVecI1()
22067 DAG.getBitcast(ExtVT, In), in LowerTruncateVecI1()
22068 DAG.getConstant(ShiftInx, DL, ExtVT)); in LowerTruncateVecI1()
22111 MVT ExtVT = MVT::getVectorVT(EltVT, NumElts); in LowerTruncateVecI1() local
22112 In = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, In); in LowerTruncateVecI1()
22113 InVT = ExtVT; in LowerTruncateVecI1()
25358 MVT ExtVT = VT; in LowerSIGN_EXTEND_Mask() local
25364 ExtVT = MVT::getVectorVT(MVT::i32, NumElts); in LowerSIGN_EXTEND_Mask()
25368 MVT WideVT = ExtVT; in LowerSIGN_EXTEND_Mask()
25369 if (!ExtVT.is512BitVector() && !Subtarget.hasVLX()) { in LowerSIGN_EXTEND_Mask()
25370 NumElts *= 512 / ExtVT.getSizeInBits(); in LowerSIGN_EXTEND_Mask()
25374 WideVT = MVT::getVectorVT(ExtVT.getVectorElementType(), NumElts); in LowerSIGN_EXTEND_Mask()
25389 if (VT != ExtVT) { in LowerSIGN_EXTEND_Mask()
29803 MVT ExtVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in LowerShiftByScalarVariable() local
29804 if (supportedVectorShiftWithBaseAmnt(ExtVT, Subtarget, Opcode)) { in LowerShiftByScalarVariable()
29810 SDValue BitMask = DAG.getConstant(-1, dl, ExtVT); in LowerShiftByScalarVariable()
29811 BitMask = getTargetVShiftNode(LogicalX86Op, dl, ExtVT, BitMask, in LowerShiftByScalarVariable()
29814 BitMask = getTargetVShiftByConstNode(LogicalX86Op, dl, ExtVT, BitMask, in LowerShiftByScalarVariable()
29820 SDValue Res = getTargetVShiftNode(LogicalX86Op, dl, ExtVT, in LowerShiftByScalarVariable()
29821 DAG.getBitcast(ExtVT, R), BaseShAmt, in LowerShiftByScalarVariable()
29829 SDValue SignMask = DAG.getConstant(0x8080, dl, ExtVT); in LowerShiftByScalarVariable()
29831 getTargetVShiftNode(LogicalX86Op, dl, ExtVT, SignMask, BaseShAmt, in LowerShiftByScalarVariable()
30130 MVT ExtVT = MVT::getVectorVT(EvtSVT, VT.getVectorNumElements()); in LowerShift() local
30132 R = DAG.getNode(ExtOpc, dl, ExtVT, R); in LowerShift()
30133 Amt = DAG.getNode(ISD::ZERO_EXTEND, dl, ExtVT, Amt); in LowerShift()
30135 DAG.getNode(Opc, dl, ExtVT, R, Amt)); in LowerShift()
30190 MVT ExtVT = MVT::getVectorVT(MVT::i16, VT.getVectorNumElements() / 2); in LowerShift() local
30224 Amt = DAG.getBitcast(ExtVT, Amt); in LowerShift()
30225 Amt = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ExtVT, Amt, 5, DAG); in LowerShift()
30257 ALo = DAG.getBitcast(ExtVT, ALo); in LowerShift()
30258 AHi = DAG.getBitcast(ExtVT, AHi); in LowerShift()
30259 RLo = DAG.getBitcast(ExtVT, RLo); in LowerShift()
30260 RHi = DAG.getBitcast(ExtVT, RHi); in LowerShift()
30263 SDValue MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 4, DAG); in LowerShift()
30264 SDValue MHi = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RHi, 4, DAG); in LowerShift()
30265 RLo = SignBitSelect(ExtVT, ALo, MLo, RLo); in LowerShift()
30266 RHi = SignBitSelect(ExtVT, AHi, MHi, RHi); in LowerShift()
30269 ALo = DAG.getNode(ISD::ADD, dl, ExtVT, ALo, ALo); in LowerShift()
30270 AHi = DAG.getNode(ISD::ADD, dl, ExtVT, AHi, AHi); in LowerShift()
30273 MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 2, DAG); in LowerShift()
30274 MHi = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RHi, 2, DAG); in LowerShift()
30275 RLo = SignBitSelect(ExtVT, ALo, MLo, RLo); in LowerShift()
30276 RHi = SignBitSelect(ExtVT, AHi, MHi, RHi); in LowerShift()
30279 ALo = DAG.getNode(ISD::ADD, dl, ExtVT, ALo, ALo); in LowerShift()
30280 AHi = DAG.getNode(ISD::ADD, dl, ExtVT, AHi, AHi); in LowerShift()
30283 MLo = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RLo, 1, DAG); in LowerShift()
30284 MHi = getTargetVShiftByConstNode(X86OpcI, dl, ExtVT, RHi, 1, DAG); in LowerShift()
30285 RLo = SignBitSelect(ExtVT, ALo, MLo, RLo); in LowerShift()
30286 RHi = SignBitSelect(ExtVT, AHi, MHi, RHi); in LowerShift()
30290 RLo = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExtVT, RLo, 8, DAG); in LowerShift()
30291 RHi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExtVT, RHi, 8, DAG); in LowerShift()
30297 MVT ExtVT = MVT::v8i32; in LowerShift() local
30303 ALo = DAG.getBitcast(ExtVT, ALo); in LowerShift()
30304 AHi = DAG.getBitcast(ExtVT, AHi); in LowerShift()
30305 RLo = DAG.getBitcast(ExtVT, RLo); in LowerShift()
30306 RHi = DAG.getBitcast(ExtVT, RHi); in LowerShift()
30307 SDValue Lo = DAG.getNode(Opc, dl, ExtVT, RLo, ALo); in LowerShift()
30308 SDValue Hi = DAG.getNode(Opc, dl, ExtVT, RHi, AHi); in LowerShift()
30309 Lo = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExtVT, Lo, 16, DAG); in LowerShift()
30310 Hi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExtVT, Hi, 16, DAG); in LowerShift()
30324 MVT ExtVT = MVT::getVectorVT(MVT::i8, VT.getVectorNumElements() * 2); in LowerShift() local
30325 V0 = DAG.getBitcast(ExtVT, V0); in LowerShift()
30326 V1 = DAG.getBitcast(ExtVT, V1); in LowerShift()
30327 Sel = DAG.getBitcast(ExtVT, Sel); in LowerShift()
30329 VT, DAG.getNode(X86ISD::BLENDV, dl, ExtVT, Sel, V0, V1)); in LowerShift()
30439 MVT ExtVT = MVT::getVectorVT(ExtSVT, NumElts / 2); in LowerFunnelShift() local
30453 if (supportedVectorShiftWithBaseAmnt(ExtVT, Subtarget, ShiftOpc)) { in LowerFunnelShift()
30460 SDValue Lo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, Op1, Op0)); in LowerFunnelShift()
30461 SDValue Hi = DAG.getBitcast(ExtVT, getUnpackh(DAG, DL, VT, Op1, Op0)); in LowerFunnelShift()
30462 Lo = getTargetVShiftNode(ShiftOpc, DL, ExtVT, Lo, ScalarAmt, in LowerFunnelShift()
30464 Hi = getTargetVShiftNode(ShiftOpc, DL, ExtVT, Hi, ScalarAmt, in LowerFunnelShift()
30498 supportedVectorVarShift(ExtVT, Subtarget, ShiftOpc)) { in LowerFunnelShift()
30500 SDValue RLo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, Op1, Op0)); in LowerFunnelShift()
30501 SDValue RHi = DAG.getBitcast(ExtVT, getUnpackh(DAG, DL, VT, Op1, Op0)); in LowerFunnelShift()
30502 SDValue ALo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, AmtMod, Z)); in LowerFunnelShift()
30503 SDValue AHi = DAG.getBitcast(ExtVT, getUnpackh(DAG, DL, VT, AmtMod, Z)); in LowerFunnelShift()
30504 SDValue Lo = DAG.getNode(ShiftOpc, DL, ExtVT, RLo, ALo); in LowerFunnelShift()
30505 SDValue Hi = DAG.getNode(ShiftOpc, DL, ExtVT, RHi, AHi); in LowerFunnelShift()
30647 MVT ExtVT = MVT::getVectorVT(ExtSVT, NumElts / 2); in LowerRotate() local
30663 SDValue Lo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, R, R)); in LowerRotate()
30664 SDValue Hi = DAG.getBitcast(ExtVT, getUnpackh(DAG, DL, VT, R, R)); in LowerRotate()
30665 Lo = getTargetVShiftNode(ShiftX86Opc, DL, ExtVT, Lo, BaseRotAmt, in LowerRotate()
30667 Hi = getTargetVShiftNode(ShiftX86Opc, DL, ExtVT, Hi, BaseRotAmt, in LowerRotate()
30705 if (IsConstAmt || supportedVectorVarShift(ExtVT, Subtarget, ShiftOpc)) { in LowerRotate()
30707 SDValue RLo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, R, R)); in LowerRotate()
30708 SDValue RHi = DAG.getBitcast(ExtVT, getUnpackh(DAG, DL, VT, R, R)); in LowerRotate()
30709 SDValue ALo = DAG.getBitcast(ExtVT, getUnpackl(DAG, DL, VT, AmtMod, Z)); in LowerRotate()
30710 SDValue AHi = DAG.getBitcast(ExtVT, getUnpackh(DAG, DL, VT, AmtMod, Z)); in LowerRotate()
30711 SDValue Lo = DAG.getNode(ShiftOpc, DL, ExtVT, RLo, ALo); in LowerRotate()
30712 SDValue Hi = DAG.getNode(ShiftOpc, DL, ExtVT, RHi, AHi); in LowerRotate()
30748 Amt = DAG.getBitcast(ExtVT, Amt); in LowerRotate()
30749 Amt = DAG.getNode(ISD::SHL, DL, ExtVT, Amt, DAG.getConstant(5, DL, ExtVT)); in LowerRotate()
36699 EVT ExtVT = EVT::getVectorVT(*TLO.DAG.getContext(), ExtSVT, in targetShrinkDemandedConstant() local
36703 Op.getOperand(1), TLO.DAG.getValueType(ExtVT)); in targetShrinkDemandedConstant()
41510 MVT ExtVT = VT.getSimpleVT(); in SimplifyDemandedVectorEltsForTargetNode() local
41511 ExtVT = MVT::getVectorVT(ExtVT.getScalarType(), in SimplifyDemandedVectorEltsForTargetNode()
41512 ExtSizeInBits / ExtVT.getScalarSizeInBits()); in SimplifyDemandedVectorEltsForTargetNode()
41513 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ops); in SimplifyDemandedVectorEltsForTargetNode()
46279 EVT ExtVT = VT.changeVectorElementType(MVT::i16); in combineMulToPMADDWD() local
46280 Src = DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N), ExtVT, Src); in combineMulToPMADDWD()