Lines Matching refs:Dl
3027 const SDLoc &Dl, SelectionDAG &DAG) { in lowerMasksToReg() argument
3031 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, Dl, ValLoc, ValArg, in lowerMasksToReg()
3032 DAG.getIntPtrConstant(0, Dl)); in lowerMasksToReg()
3042 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValToCopy); in lowerMasksToReg()
3053 return DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValArg); in lowerMasksToReg()
3058 const SDLoc &Dl, SelectionDAG &DAG, SDValue &Arg, in Passv64i1ArgInRegs() argument
3072 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg, in Passv64i1ArgInRegs()
3073 DAG.getConstant(0, Dl, MVT::i32)); in Passv64i1ArgInRegs()
3074 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg, in Passv64i1ArgInRegs()
3075 DAG.getConstant(1, Dl, MVT::i32)); in Passv64i1ArgInRegs()
3351 const SDLoc &Dl, const X86Subtarget &Subtarget, in getv64i1Argument() argument
3373 ArgValueLo = DAG.getCopyFromReg(Root, Dl, Reg, MVT::i32); in getv64i1Argument()
3375 ArgValueHi = DAG.getCopyFromReg(Root, Dl, Reg, MVT::i32); in getv64i1Argument()
3380 DAG.getCopyFromReg(Root, Dl, VA.getLocReg(), MVT::i32, *InFlag); in getv64i1Argument()
3383 DAG.getCopyFromReg(Root, Dl, NextVA.getLocReg(), MVT::i32, *InFlag); in getv64i1Argument()
3394 return DAG.getNode(ISD::CONCAT_VECTORS, Dl, MVT::v64i1, Lo, Hi); in getv64i1Argument()
3401 const EVT &ValLoc, const SDLoc &Dl, in lowerRegToMasks() argument
3406 return DAG.getNode(ISD::SCALAR_TO_VECTOR, Dl, MVT::v1i1, ValReturned); in lowerRegToMasks()
3428 ValReturned = DAG.getNode(ISD::TRUNCATE, Dl, maskLen, ValReturned); in lowerRegToMasks()
27733 EmitTruncSStore(bool SignedSat, SDValue Chain, const SDLoc &Dl, SDValue Val, in EmitTruncSStore() argument
27740 return DAG.getMemIntrinsicNode(Opc, Dl, VTs, Ops, MemVT, MMO); in EmitTruncSStore()
27745 EmitMaskedTruncSStore(bool SignedSat, SDValue Chain, const SDLoc &Dl, in EmitMaskedTruncSStore() argument
27751 return DAG.getMemIntrinsicNode(Opc, Dl, VTs, Ops, MemVT, MMO); in EmitMaskedTruncSStore()