Lines Matching refs:CurrVT

28700   MVT CurrVT = MVT::getVectorVT(MVT::i8, NumBytes);  in LowerVectorCTLZInRegLUT()  local
28711 SDValue InRegLUT = DAG.getBuildVector(CurrVT, DL, LUTVec); in LowerVectorCTLZInRegLUT()
28718 SDValue Op0 = DAG.getBitcast(CurrVT, Op.getOperand(0)); in LowerVectorCTLZInRegLUT()
28719 SDValue Zero = DAG.getConstant(0, DL, CurrVT); in LowerVectorCTLZInRegLUT()
28721 SDValue NibbleShift = DAG.getConstant(0x4, DL, CurrVT); in LowerVectorCTLZInRegLUT()
28723 SDValue Hi = DAG.getNode(ISD::SRL, DL, CurrVT, Op0, NibbleShift); in LowerVectorCTLZInRegLUT()
28725 if (CurrVT.is512BitVector()) { in LowerVectorCTLZInRegLUT()
28726 MVT MaskVT = MVT::getVectorVT(MVT::i1, CurrVT.getVectorNumElements()); in LowerVectorCTLZInRegLUT()
28728 HiZ = DAG.getNode(ISD::SIGN_EXTEND, DL, CurrVT, HiZ); in LowerVectorCTLZInRegLUT()
28730 HiZ = DAG.getSetCC(DL, CurrVT, Hi, Zero, ISD::SETEQ); in LowerVectorCTLZInRegLUT()
28733 Lo = DAG.getNode(X86ISD::PSHUFB, DL, CurrVT, InRegLUT, Lo); in LowerVectorCTLZInRegLUT()
28734 Hi = DAG.getNode(X86ISD::PSHUFB, DL, CurrVT, InRegLUT, Hi); in LowerVectorCTLZInRegLUT()
28735 Lo = DAG.getNode(ISD::AND, DL, CurrVT, Lo, HiZ); in LowerVectorCTLZInRegLUT()
28736 SDValue Res = DAG.getNode(ISD::ADD, DL, CurrVT, Lo, Hi); in LowerVectorCTLZInRegLUT()
28743 while (CurrVT != VT) { in LowerVectorCTLZInRegLUT()
28744 int CurrScalarSizeInBits = CurrVT.getScalarSizeInBits(); in LowerVectorCTLZInRegLUT()
28745 int CurrNumElts = CurrVT.getVectorNumElements(); in LowerVectorCTLZInRegLUT()
28751 if (CurrVT.is512BitVector()) { in LowerVectorCTLZInRegLUT()
28752 MVT MaskVT = MVT::getVectorVT(MVT::i1, CurrVT.getVectorNumElements()); in LowerVectorCTLZInRegLUT()
28753 HiZ = DAG.getSetCC(DL, MaskVT, DAG.getBitcast(CurrVT, Op0), in LowerVectorCTLZInRegLUT()
28754 DAG.getBitcast(CurrVT, Zero), ISD::SETEQ); in LowerVectorCTLZInRegLUT()
28755 HiZ = DAG.getNode(ISD::SIGN_EXTEND, DL, CurrVT, HiZ); in LowerVectorCTLZInRegLUT()
28757 HiZ = DAG.getSetCC(DL, CurrVT, DAG.getBitcast(CurrVT, Op0), in LowerVectorCTLZInRegLUT()
28758 DAG.getBitcast(CurrVT, Zero), ISD::SETEQ); in LowerVectorCTLZInRegLUT()
28770 CurrVT = NextVT; in LowerVectorCTLZInRegLUT()