131         static_assert(X86::FP6 - X86::FP0 == 6, "sequential regnums");  in calcLiveInMask()
132         if (Reg >= X86::FP0 && Reg <= X86::FP6) {  in calcLiveInMask()
133           Mask |= 1 << (Reg - X86::FP0);  in calcLiveInMask()
205       return StackTop - 1 - getSlot(RegNo) + X86::ST0;  in getSTReg()
241       BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg);  in moveToTop()
251       BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg);  in duplicateToTop()
295       return X86::RFP80RegClass.contains(DstReg) ||  in isFPCopy()
296         X86::RFP80RegClass.contains(SrcReg);  in isFPCopy()
318   assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");  in getFPReg()
319   return Reg - X86::FP0;  in getFPReg()
330   static_assert(X86::FP6 == X86::FP0+6, "Register enums aren't sorted right!");  in runOnMachineFunction()
333     if (!MRI.reg_nodbg_empty(X86::FP0 + i)) {  in runOnMachineFunction()
430         X86::RFP80RegClass.contains(MI.getOperand(0).getReg()))  in processBasicBlock()
470       static_assert(X86::FP7 - X86::FP0 == 7, "sequential FP regnumbers");  in processBasicBlock()
471       if (Reg >= X86::FP0 && Reg <= X86::FP6 && isLive(Reg-X86::FP0)) {  in processBasicBlock()
472         LLVM_DEBUG(dbgs() << "Register FP#" << Reg - X86::FP0 << " is dead!\n");  in processBasicBlock()
473         freeStackSlotAfter(I, Reg-X86::FP0);  in processBasicBlock()
627   { X86::ABS_Fp32     , X86::ABS_F     },
628   { X86::ABS_Fp64     , X86::ABS_F     },
629   { X86::ABS_Fp80     , X86::ABS_F     },
630   { X86::ADD_Fp32m    , X86::ADD_F32m  },
631   { X86::ADD_Fp64m    , X86::ADD_F64m  },
632   { X86::ADD_Fp64m32  , X86::ADD_F32m  },
633   { X86::ADD_Fp80m32  , X86::ADD_F32m  },
634   { X86::ADD_Fp80m64  , X86::ADD_F64m  },
635   { X86::ADD_FpI16m32 , X86::ADD_FI16m },
636   { X86::ADD_FpI16m64 , X86::ADD_FI16m },
637   { X86::ADD_FpI16m80 , X86::ADD_FI16m },
638   { X86::ADD_FpI32m32 , X86::ADD_FI32m },
639   { X86::ADD_FpI32m64 , X86::ADD_FI32m },
640   { X86::ADD_FpI32m80 , X86::ADD_FI32m },
641   { X86::CHS_Fp32     , X86::CHS_F     },
642   { X86::CHS_Fp64     , X86::CHS_F     },
643   { X86::CHS_Fp80     , X86::CHS_F     },
644   { X86::CMOVBE_Fp32  , X86::CMOVBE_F  },
645   { X86::CMOVBE_Fp64  , X86::CMOVBE_F  },
646   { X86::CMOVBE_Fp80  , X86::CMOVBE_F  },
647   { X86::CMOVB_Fp32   , X86::CMOVB_F   },
648   { X86::CMOVB_Fp64   , X86::CMOVB_F  },
649   { X86::CMOVB_Fp80   , X86::CMOVB_F  },
650   { X86::CMOVE_Fp32   , X86::CMOVE_F  },
651   { X86::CMOVE_Fp64   , X86::CMOVE_F   },
652   { X86::CMOVE_Fp80   , X86::CMOVE_F   },
653   { X86::CMOVNBE_Fp32 , X86::CMOVNBE_F },
654   { X86::CMOVNBE_Fp64 , X86::CMOVNBE_F },
655   { X86::CMOVNBE_Fp80 , X86::CMOVNBE_F },
656   { X86::CMOVNB_Fp32  , X86::CMOVNB_F  },
657   { X86::CMOVNB_Fp64  , X86::CMOVNB_F  },
658   { X86::CMOVNB_Fp80  , X86::CMOVNB_F  },
659   { X86::CMOVNE_Fp32  , X86::CMOVNE_F  },
660   { X86::CMOVNE_Fp64  , X86::CMOVNE_F  },
661   { X86::CMOVNE_Fp80  , X86::CMOVNE_F  },
662   { X86::CMOVNP_Fp32  , X86::CMOVNP_F  },
663   { X86::CMOVNP_Fp64  , X86::CMOVNP_F  },
664   { X86::CMOVNP_Fp80  , X86::CMOVNP_F  },
665   { X86::CMOVP_Fp32   , X86::CMOVP_F   },
666   { X86::CMOVP_Fp64   , X86::CMOVP_F   },
667   { X86::CMOVP_Fp80   , X86::CMOVP_F   },
668   { X86::COM_FpIr32   , X86::COM_FIr   },
669   { X86::COM_FpIr64   , X86::COM_FIr   },
670   { X86::COM_FpIr80   , X86::COM_FIr   },
671   { X86::COM_Fpr32    , X86::COM_FST0r },
672   { X86::COM_Fpr64    , X86::COM_FST0r },
673   { X86::COM_Fpr80    , X86::COM_FST0r },
674   { X86::DIVR_Fp32m   , X86::DIVR_F32m },
675   { X86::DIVR_Fp64m   , X86::DIVR_F64m },
676   { X86::DIVR_Fp64m32 , X86::DIVR_F32m },
677   { X86::DIVR_Fp80m32 , X86::DIVR_F32m },
678   { X86::DIVR_Fp80m64 , X86::DIVR_F64m },
679   { X86::DIVR_FpI16m32, X86::DIVR_FI16m},
680   { X86::DIVR_FpI16m64, X86::DIVR_FI16m},
681   { X86::DIVR_FpI16m80, X86::DIVR_FI16m},
682   { X86::DIVR_FpI32m32, X86::DIVR_FI32m},
683   { X86::DIVR_FpI32m64, X86::DIVR_FI32m},
684   { X86::DIVR_FpI32m80, X86::DIVR_FI32m},
685   { X86::DIV_Fp32m    , X86::DIV_F32m  },
686   { X86::DIV_Fp64m    , X86::DIV_F64m  },
687   { X86::DIV_Fp64m32  , X86::DIV_F32m  },
688   { X86::DIV_Fp80m32  , X86::DIV_F32m  },
689   { X86::DIV_Fp80m64  , X86::DIV_F64m  },
690   { X86::DIV_FpI16m32 , X86::DIV_FI16m },
691   { X86::DIV_FpI16m64 , X86::DIV_FI16m },
692   { X86::DIV_FpI16m80 , X86::DIV_FI16m },
693   { X86::DIV_FpI32m32 , X86::DIV_FI32m },
694   { X86::DIV_FpI32m64 , X86::DIV_FI32m },
695   { X86::DIV_FpI32m80 , X86::DIV_FI32m },
696   { X86::ILD_Fp16m32  , X86::ILD_F16m  },
697   { X86::ILD_Fp16m64  , X86::ILD_F16m  },
698   { X86::ILD_Fp16m80  , X86::ILD_F16m  },
699   { X86::ILD_Fp32m32  , X86::ILD_F32m  },
700   { X86::ILD_Fp32m64  , X86::ILD_F32m  },
701   { X86::ILD_Fp32m80  , X86::ILD_F32m  },
702   { X86::ILD_Fp64m32  , X86::ILD_F64m  },
703   { X86::ILD_Fp64m64  , X86::ILD_F64m  },
704   { X86::ILD_Fp64m80  , X86::ILD_F64m  },
705   { X86::ISTT_Fp16m32 , X86::ISTT_FP16m},
706   { X86::ISTT_Fp16m64 , X86::ISTT_FP16m},
707   { X86::ISTT_Fp16m80 , X86::ISTT_FP16m},
708   { X86::ISTT_Fp32m32 , X86::ISTT_FP32m},
709   { X86::ISTT_Fp32m64 , X86::ISTT_FP32m},
710   { X86::ISTT_Fp32m80 , X86::ISTT_FP32m},
711   { X86::ISTT_Fp64m32 , X86::ISTT_FP64m},
712   { X86::ISTT_Fp64m64 , X86::ISTT_FP64m},
713   { X86::ISTT_Fp64m80 , X86::ISTT_FP64m},
714   { X86::IST_Fp16m32  , X86::IST_F16m  },
715   { X86::IST_Fp16m64  , X86::IST_F16m  },
716   { X86::IST_Fp16m80  , X86::IST_F16m  },
717   { X86::IST_Fp32m32  , X86::IST_F32m  },
718   { X86::IST_Fp32m64  , X86::IST_F32m  },
719   { X86::IST_Fp32m80  , X86::IST_F32m  },
720   { X86::IST_Fp64m32  , X86::IST_FP64m },
721   { X86::IST_Fp64m64  , X86::IST_FP64m },
722   { X86::IST_Fp64m80  , X86::IST_FP64m },
723   { X86::LD_Fp032     , X86::LD_F0     },
724   { X86::LD_Fp064     , X86::LD_F0     },
725   { X86::LD_Fp080     , X86::LD_F0     },
726   { X86::LD_Fp132     , X86::LD_F1     },
727   { X86::LD_Fp164     , X86::LD_F1     },
728   { X86::LD_Fp180     , X86::LD_F1     },
729   { X86::LD_Fp32m     , X86::LD_F32m   },
730   { X86::LD_Fp32m64   , X86::LD_F32m   },
731   { X86::LD_Fp32m80   , X86::LD_F32m   },
732   { X86::LD_Fp64m     , X86::LD_F64m   },
733   { X86::LD_Fp64m80   , X86::LD_F64m   },
734   { X86::LD_Fp80m     , X86::LD_F80m   },
735   { X86::MUL_Fp32m    , X86::MUL_F32m  },
736   { X86::MUL_Fp64m    , X86::MUL_F64m  },
737   { X86::MUL_Fp64m32  , X86::MUL_F32m  },
738   { X86::MUL_Fp80m32  , X86::MUL_F32m  },
739   { X86::MUL_Fp80m64  , X86::MUL_F64m  },
740   { X86::MUL_FpI16m32 , X86::MUL_FI16m },
741   { X86::MUL_FpI16m64 , X86::MUL_FI16m },
742   { X86::MUL_FpI16m80 , X86::MUL_FI16m },
743   { X86::MUL_FpI32m32 , X86::MUL_FI32m },
744   { X86::MUL_FpI32m64 , X86::MUL_FI32m },
745   { X86::MUL_FpI32m80 , X86::MUL_FI32m },
746   { X86::SQRT_Fp32    , X86::SQRT_F    },
747   { X86::SQRT_Fp64    , X86::SQRT_F    },
748   { X86::SQRT_Fp80    , X86::SQRT_F    },
749   { X86::ST_Fp32m     , X86::ST_F32m   },
750   { X86::ST_Fp64m     , X86::ST_F64m   },
751   { X86::ST_Fp64m32   , X86::ST_F32m   },
752   { X86::ST_Fp80m32   , X86::ST_F32m   },
753   { X86::ST_Fp80m64   , X86::ST_F64m   },
754   { X86::ST_FpP80m    , X86::ST_FP80m  },
755   { X86::SUBR_Fp32m   , X86::SUBR_F32m },
756   { X86::SUBR_Fp64m   , X86::SUBR_F64m },
757   { X86::SUBR_Fp64m32 , X86::SUBR_F32m },
758   { X86::SUBR_Fp80m32 , X86::SUBR_F32m },
759   { X86::SUBR_Fp80m64 , X86::SUBR_F64m },
760   { X86::SUBR_FpI16m32, X86::SUBR_FI16m},
761   { X86::SUBR_FpI16m64, X86::SUBR_FI16m},
762   { X86::SUBR_FpI16m80, X86::SUBR_FI16m},
763   { X86::SUBR_FpI32m32, X86::SUBR_FI32m},
764   { X86::SUBR_FpI32m64, X86::SUBR_FI32m},
765   { X86::SUBR_FpI32m80, X86::SUBR_FI32m},
766   { X86::SUB_Fp32m    , X86::SUB_F32m  },
767   { X86::SUB_Fp64m    , X86::SUB_F64m  },
768   { X86::SUB_Fp64m32  , X86::SUB_F32m  },
769   { X86::SUB_Fp80m32  , X86::SUB_F32m  },
770   { X86::SUB_Fp80m64  , X86::SUB_F64m  },
771   { X86::SUB_FpI16m32 , X86::SUB_FI16m },
772   { X86::SUB_FpI16m64 , X86::SUB_FI16m },
773   { X86::SUB_FpI16m80 , X86::SUB_FI16m },
774   { X86::SUB_FpI32m32 , X86::SUB_FI32m },
775   { X86::SUB_FpI32m64 , X86::SUB_FI32m },
776   { X86::SUB_FpI32m80 , X86::SUB_FI32m },
777   { X86::TST_Fp32     , X86::TST_F     },
778   { X86::TST_Fp64     , X86::TST_F     },
779   { X86::TST_Fp80     , X86::TST_F     },
780   { X86::UCOM_FpIr32  , X86::UCOM_FIr  },
781   { X86::UCOM_FpIr64  , X86::UCOM_FIr  },
782   { X86::UCOM_FpIr80  , X86::UCOM_FIr  },
783   { X86::UCOM_Fpr32   , X86::UCOM_Fr   },
784   { X86::UCOM_Fpr64   , X86::UCOM_Fr   },
785   { X86::UCOM_Fpr80   , X86::UCOM_Fr   },
786   { X86::XAM_Fp32     , X86::XAM_F     },
787   { X86::XAM_Fp64     , X86::XAM_F     },
788   { X86::XAM_Fp80     , X86::XAM_F     },
806   { X86::ADD_FrST0 , X86::ADD_FPrST0  },
808   { X86::COMP_FST0r, X86::FCOMPP      },
809   { X86::COM_FIr   , X86::COM_FIPr    },
810   { X86::COM_FST0r , X86::COMP_FST0r  },
812   { X86::DIVR_FrST0, X86::DIVR_FPrST0 },
813   { X86::DIV_FrST0 , X86::DIV_FPrST0  },
815   { X86::IST_F16m  , X86::IST_FP16m   },
816   { X86::IST_F32m  , X86::IST_FP32m   },
818   { X86::MUL_FrST0 , X86::MUL_FPrST0  },
820   { X86::ST_F32m   , X86::ST_FP32m    },
821   { X86::ST_F64m   , X86::ST_FP64m    },
822   { X86::ST_Frr    , X86::ST_FPrr     },
824   { X86::SUBR_FrST0, X86::SUBR_FPrST0 },
825   { X86::SUB_FrST0 , X86::SUB_FPrST0  },
827   { X86::UCOM_FIr  , X86::UCOM_FIPr   },
829   { X86::UCOM_FPr  , X86::UCOM_FPPr   },
830   { X86::UCOM_Fr   , X86::UCOM_FPr    },
834   if (const MachineOperand *MO = MI.findRegisterDefOperand(X86::FPSW))  in doesInstructionSetFPSW()
845     if (X86::isX87Instruction(MI))  in getNextFPInstruction()
868     if (Opcode == X86::FCOMPP || Opcode == X86::UCOM_FPPr)  in popStackAfter()
877       if (Next != MBB.end() && Next->readsRegister(X86::FPSW))  in popStackAfter()
880     I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0);  in popStackAfter()
911   return BuildMI(*MBB, I, DebugLoc(), TII->get(X86::ST_FPrr))  in freeStackSlotBefore()
969     BuildMI(*MBB, I, DebugLoc(), TII->get(X86::LD_F0));  in adjustLiveRegs()
1016       bool ClobbersFP0 = Op.clobbersPhysReg(X86::FP0);  in handleCall()
1018       static_assert(X86::FP7 - X86::FP0 == 7, "sequential FP regnumbers");  in handleCall()
1020         assert(Op.clobbersPhysReg(X86::FP0 + i) == ClobbersFP0 &&  in handleCall()
1028     if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)  in handleCall()
1082     if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)  in handleReturn()
1168       MachineOperand::CreateReg(X86::ST0, /*isDef*/ true, /*isImp*/ true));  in handleZeroArgFP()
1181   assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) &&  in handleOneArgFP()
1186   bool KillsSrc = MI.killsRegister(X86::FP0 + Reg);  in handleOneArgFP()
1194   if (!KillsSrc && (MI.getOpcode() == X86::IST_Fp64m32 ||  in handleOneArgFP()
1195                     MI.getOpcode() == X86::ISTT_Fp16m32 ||  in handleOneArgFP()
1196                     MI.getOpcode() == X86::ISTT_Fp32m32 ||  in handleOneArgFP()
1197                     MI.getOpcode() == X86::ISTT_Fp64m32 ||  in handleOneArgFP()
1198                     MI.getOpcode() == X86::IST_Fp64m64 ||  in handleOneArgFP()
1199                     MI.getOpcode() == X86::ISTT_Fp16m64 ||  in handleOneArgFP()
1200                     MI.getOpcode() == X86::ISTT_Fp32m64 ||  in handleOneArgFP()
1201                     MI.getOpcode() == X86::ISTT_Fp64m64 ||  in handleOneArgFP()
1202                     MI.getOpcode() == X86::IST_Fp64m80 ||  in handleOneArgFP()
1203                     MI.getOpcode() == X86::ISTT_Fp16m80 ||  in handleOneArgFP()
1204                     MI.getOpcode() == X86::ISTT_Fp32m80 ||  in handleOneArgFP()
1205                     MI.getOpcode() == X86::ISTT_Fp64m80 ||  in handleOneArgFP()
1206                     MI.getOpcode() == X86::ST_FpP80m)) {  in handleOneArgFP()
1216       MachineOperand::CreateReg(X86::ST0, /*isDef*/ false, /*isImp*/ true));  in handleOneArgFP()
1218   if (MI.getOpcode() == X86::IST_FP64m || MI.getOpcode() == X86::ISTT_FP16m ||  in handleOneArgFP()
1219       MI.getOpcode() == X86::ISTT_FP32m || MI.getOpcode() == X86::ISTT_FP64m ||  in handleOneArgFP()
1220       MI.getOpcode() == X86::ST_FP80m) {  in handleOneArgFP()
1249   bool KillsSrc = MI.killsRegister(X86::FP0 + Reg);  in handleOneArgFPRW()
1279   { X86::ADD_Fp32  , X86::ADD_FST0r },
1280   { X86::ADD_Fp64  , X86::ADD_FST0r },
1281   { X86::ADD_Fp80  , X86::ADD_FST0r },
1282   { X86::DIV_Fp32  , X86::DIV_FST0r },
1283   { X86::DIV_Fp64  , X86::DIV_FST0r },
1284   { X86::DIV_Fp80  , X86::DIV_FST0r },
1285   { X86::MUL_Fp32  , X86::MUL_FST0r },
1286   { X86::MUL_Fp64  , X86::MUL_FST0r },
1287   { X86::MUL_Fp80  , X86::MUL_FST0r },
1288   { X86::SUB_Fp32  , X86::SUB_FST0r },
1289   { X86::SUB_Fp64  , X86::SUB_FST0r },
1290   { X86::SUB_Fp80  , X86::SUB_FST0r },
1295   { X86::ADD_Fp32  , X86::ADD_FST0r  },   // commutative
1296   { X86::ADD_Fp64  , X86::ADD_FST0r  },   // commutative
1297   { X86::ADD_Fp80  , X86::ADD_FST0r  },   // commutative
1298   { X86::DIV_Fp32  , X86::DIVR_FST0r },
1299   { X86::DIV_Fp64  , X86::DIVR_FST0r },
1300   { X86::DIV_Fp80  , X86::DIVR_FST0r },
1301   { X86::MUL_Fp32  , X86::MUL_FST0r  },   // commutative
1302   { X86::MUL_Fp64  , X86::MUL_FST0r  },   // commutative
1303   { X86::MUL_Fp80  , X86::MUL_FST0r  },   // commutative
1304   { X86::SUB_Fp32  , X86::SUBR_FST0r },
1305   { X86::SUB_Fp64  , X86::SUBR_FST0r },
1306   { X86::SUB_Fp80  , X86::SUBR_FST0r },
1311   { X86::ADD_Fp32  , X86::ADD_FrST0  },   // commutative
1312   { X86::ADD_Fp64  , X86::ADD_FrST0  },   // commutative
1313   { X86::ADD_Fp80  , X86::ADD_FrST0  },   // commutative
1314   { X86::DIV_Fp32  , X86::DIVR_FrST0 },
1315   { X86::DIV_Fp64  , X86::DIVR_FrST0 },
1316   { X86::DIV_Fp80  , X86::DIVR_FrST0 },
1317   { X86::MUL_Fp32  , X86::MUL_FrST0  },   // commutative
1318   { X86::MUL_Fp64  , X86::MUL_FrST0  },   // commutative
1319   { X86::MUL_Fp80  , X86::MUL_FrST0  },   // commutative
1320   { X86::SUB_Fp32  , X86::SUBR_FrST0 },
1321   { X86::SUB_Fp64  , X86::SUBR_FrST0 },
1322   { X86::SUB_Fp80  , X86::SUBR_FrST0 },
1327   { X86::ADD_Fp32  , X86::ADD_FrST0 },
1328   { X86::ADD_Fp64  , X86::ADD_FrST0 },
1329   { X86::ADD_Fp80  , X86::ADD_FrST0 },
1330   { X86::DIV_Fp32  , X86::DIV_FrST0 },
1331   { X86::DIV_Fp64  , X86::DIV_FrST0 },
1332   { X86::DIV_Fp80  , X86::DIV_FrST0 },
1333   { X86::MUL_Fp32  , X86::MUL_FrST0 },
1334   { X86::MUL_Fp64  , X86::MUL_FrST0 },
1335   { X86::MUL_Fp80  , X86::MUL_FrST0 },
1336   { X86::SUB_Fp32  , X86::SUB_FrST0 },
1337   { X86::SUB_Fp64  , X86::SUB_FrST0 },
1338   { X86::SUB_Fp80  , X86::SUB_FrST0 },
1360   bool KillsOp0 = MI.killsRegister(X86::FP0 + Op0);  in handleTwoArgFP()
1361   bool KillsOp1 = MI.killsRegister(X86::FP0 + Op1);  in handleTwoArgFP()
1458   bool KillsOp0 = MI.killsRegister(X86::FP0 + Op0);  in handleCompareFP()
1459   bool KillsOp1 = MI.killsRegister(X86::FP0 + Op1);  in handleCompareFP()
1485   bool KillsOp1 = MI.killsRegister(X86::FP0 + Op1);  in handleCondMovFP()
1551     unsigned Reg = MI.getOperand(0).getReg() - X86::FP0;  in handleSpecialFP()
1553     BuildMI(*MBB, Inst, MI.getDebugLoc(), TII->get(X86::LD_F0));  in handleSpecialFP()
1608       unsigned STReg = MO.getReg() - X86::FP0;  in handleSpecialFP()
1674       if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)  in handleSpecialFP()
1703       if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)  in handleSpecialFP()
1713         Op.setReg(X86::ST0 + FPReg);  in handleSpecialFP()
1770       unsigned Reg = MO.getReg() - X86::FP0;  in setKillFlags()