336   switch (VT.SimpleTy) {  in X86FastEmitLoad()
493   switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
665     switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
1359   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpOpcode()
1382   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpImmediateOpcode()
1561     switch (SrcVT.SimpleTy) {  in X86SelectZExt()
1729       switch (SourceVT.SimpleTy) {  in X86SelectBranch()
1928   switch (VT.SimpleTy) {  in X86SelectDivRem()
2256     switch (RetVT.SimpleTy) {  in X86FastEmitSSESelect()
2279   switch (RetVT.SimpleTy) {  in X86FastEmitPseudoSelect()
2674     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2814     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2911                 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg)  in fastLowerIntrinsicCall()
2934               TII.get(TargetOpcode::COPY), Reg[VT.SimpleTy-MVT::i8])  in fastLowerIntrinsicCall()
2936       ResultReg = fastEmitInst_r(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
2949         ResultReg = fastEmitInst_rr(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
3003     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
3078     switch (ArgVT.getSimpleVT().SimpleTy) {  in fastLowerArguments()
3116     switch (VT.SimpleTy) {  in fastLowerArguments()
3676     switch (VT.SimpleTy) {  in X86MaterializeInt()
3696   switch (VT.SimpleTy) {  in X86MaterializeInt()
3732   switch (VT.SimpleTy) {  in X86MaterializeFP()
3766   Register ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy));  in X86MaterializeFP()
3841     switch (VT.SimpleTy) {  in fastMaterializeConstant()
3904   switch (VT.SimpleTy) {  in fastMaterializeFloatZero()