Lines Matching refs:Opc
86 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT,
120 bool X86SelectFPExtOrFPTrunc(const Instruction *I, unsigned Opc,
335 unsigned Opc = 0; in X86FastEmitLoad() local
339 Opc = X86::MOV8rm; in X86FastEmitLoad()
342 Opc = X86::MOV16rm; in X86FastEmitLoad()
345 Opc = X86::MOV32rm; in X86FastEmitLoad()
349 Opc = X86::MOV64rm; in X86FastEmitLoad()
352 Opc = HasAVX512 ? X86::VMOVSSZrm_alt in X86FastEmitLoad()
358 Opc = HasAVX512 ? X86::VMOVSDZrm_alt in X86FastEmitLoad()
368 Opc = HasVLX ? X86::VMOVNTDQAZ128rm : in X86FastEmitLoad()
371 Opc = HasVLX ? X86::VMOVAPSZ128rm : in X86FastEmitLoad()
374 Opc = HasVLX ? X86::VMOVUPSZ128rm : in X86FastEmitLoad()
379 Opc = HasVLX ? X86::VMOVNTDQAZ128rm : in X86FastEmitLoad()
382 Opc = HasVLX ? X86::VMOVAPDZ128rm : in X86FastEmitLoad()
385 Opc = HasVLX ? X86::VMOVUPDZ128rm : in X86FastEmitLoad()
393 Opc = HasVLX ? X86::VMOVNTDQAZ128rm : in X86FastEmitLoad()
396 Opc = HasVLX ? X86::VMOVDQA64Z128rm : in X86FastEmitLoad()
399 Opc = HasVLX ? X86::VMOVDQU64Z128rm : in X86FastEmitLoad()
405 Opc = HasVLX ? X86::VMOVNTDQAZ256rm : X86::VMOVNTDQAYrm; in X86FastEmitLoad()
409 Opc = HasVLX ? X86::VMOVAPSZ256rm : X86::VMOVAPSYrm; in X86FastEmitLoad()
411 Opc = HasVLX ? X86::VMOVUPSZ256rm : X86::VMOVUPSYrm; in X86FastEmitLoad()
416 Opc = HasVLX ? X86::VMOVNTDQAZ256rm : X86::VMOVNTDQAYrm; in X86FastEmitLoad()
420 Opc = HasVLX ? X86::VMOVAPDZ256rm : X86::VMOVAPDYrm; in X86FastEmitLoad()
422 Opc = HasVLX ? X86::VMOVUPDZ256rm : X86::VMOVUPDYrm; in X86FastEmitLoad()
430 Opc = HasVLX ? X86::VMOVNTDQAZ256rm : X86::VMOVNTDQAYrm; in X86FastEmitLoad()
434 Opc = HasVLX ? X86::VMOVDQA64Z256rm : X86::VMOVDQAYrm; in X86FastEmitLoad()
436 Opc = HasVLX ? X86::VMOVDQU64Z256rm : X86::VMOVDQUYrm; in X86FastEmitLoad()
441 Opc = X86::VMOVNTDQAZrm; in X86FastEmitLoad()
443 Opc = (Alignment >= 64) ? X86::VMOVAPSZrm : X86::VMOVUPSZrm; in X86FastEmitLoad()
448 Opc = X86::VMOVNTDQAZrm; in X86FastEmitLoad()
450 Opc = (Alignment >= 64) ? X86::VMOVAPDZrm : X86::VMOVUPDZrm; in X86FastEmitLoad()
460 Opc = X86::VMOVNTDQAZrm; in X86FastEmitLoad()
462 Opc = (Alignment >= 64) ? X86::VMOVDQA64Zrm : X86::VMOVDQU64Zrm; in X86FastEmitLoad()
470 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86FastEmitLoad()
492 unsigned Opc = 0; in X86FastEmitStore() local
505 case MVT::i8: Opc = X86::MOV8mr; break; in X86FastEmitStore()
506 case MVT::i16: Opc = X86::MOV16mr; break; in X86FastEmitStore()
508 Opc = (IsNonTemporal && HasSSE2) ? X86::MOVNTImr : X86::MOV32mr; in X86FastEmitStore()
512 Opc = (IsNonTemporal && HasSSE2) ? X86::MOVNTI_64mr : X86::MOV64mr; in X86FastEmitStore()
517 Opc = X86::MOVNTSS; in X86FastEmitStore()
519 Opc = HasAVX512 ? X86::VMOVSSZmr : in X86FastEmitStore()
522 Opc = X86::ST_Fp32m; in X86FastEmitStore()
527 Opc = X86::MOVNTSD; in X86FastEmitStore()
529 Opc = HasAVX512 ? X86::VMOVSDZmr : in X86FastEmitStore()
532 Opc = X86::ST_Fp64m; in X86FastEmitStore()
535 Opc = (IsNonTemporal && HasSSE1) ? X86::MMX_MOVNTQmr : X86::MMX_MOVQ64mr; in X86FastEmitStore()
540 Opc = HasVLX ? X86::VMOVNTPSZ128mr : in X86FastEmitStore()
543 Opc = HasVLX ? X86::VMOVAPSZ128mr : in X86FastEmitStore()
546 Opc = HasVLX ? X86::VMOVUPSZ128mr : in X86FastEmitStore()
552 Opc = HasVLX ? X86::VMOVNTPDZ128mr : in X86FastEmitStore()
555 Opc = HasVLX ? X86::VMOVAPDZ128mr : in X86FastEmitStore()
558 Opc = HasVLX ? X86::VMOVUPDZ128mr : in X86FastEmitStore()
567 Opc = HasVLX ? X86::VMOVNTDQZ128mr : in X86FastEmitStore()
570 Opc = HasVLX ? X86::VMOVDQA64Z128mr : in X86FastEmitStore()
573 Opc = HasVLX ? X86::VMOVDQU64Z128mr : in X86FastEmitStore()
580 Opc = HasVLX ? X86::VMOVNTPSZ256mr : X86::VMOVNTPSYmr; in X86FastEmitStore()
582 Opc = HasVLX ? X86::VMOVAPSZ256mr : X86::VMOVAPSYmr; in X86FastEmitStore()
584 Opc = HasVLX ? X86::VMOVUPSZ256mr : X86::VMOVUPSYmr; in X86FastEmitStore()
590 Opc = HasVLX ? X86::VMOVNTPDZ256mr : X86::VMOVNTPDYmr; in X86FastEmitStore()
592 Opc = HasVLX ? X86::VMOVAPDZ256mr : X86::VMOVAPDYmr; in X86FastEmitStore()
594 Opc = HasVLX ? X86::VMOVUPDZ256mr : X86::VMOVUPDYmr; in X86FastEmitStore()
603 Opc = HasVLX ? X86::VMOVNTDQZ256mr : X86::VMOVNTDQYmr; in X86FastEmitStore()
605 Opc = HasVLX ? X86::VMOVDQA64Z256mr : X86::VMOVDQAYmr; in X86FastEmitStore()
607 Opc = HasVLX ? X86::VMOVDQU64Z256mr : X86::VMOVDQUYmr; in X86FastEmitStore()
612 Opc = IsNonTemporal ? X86::VMOVNTPSZmr : X86::VMOVAPSZmr; in X86FastEmitStore()
614 Opc = X86::VMOVUPSZmr; in X86FastEmitStore()
619 Opc = IsNonTemporal ? X86::VMOVNTPDZmr : X86::VMOVAPDZmr; in X86FastEmitStore()
621 Opc = X86::VMOVUPDZmr; in X86FastEmitStore()
631 Opc = IsNonTemporal ? X86::VMOVNTDQZmr : X86::VMOVDQA64Zmr; in X86FastEmitStore()
633 Opc = X86::VMOVDQU64Zmr; in X86FastEmitStore()
637 const MCInstrDesc &Desc = TII.get(Opc); in X86FastEmitStore()
663 unsigned Opc = 0; in X86FastEmitStore() local
670 case MVT::i8: Opc = X86::MOV8mi; break; in X86FastEmitStore()
671 case MVT::i16: Opc = X86::MOV16mi; break; in X86FastEmitStore()
672 case MVT::i32: Opc = X86::MOV32mi; break; in X86FastEmitStore()
676 Opc = X86::MOV64mi32; in X86FastEmitStore()
680 if (Opc) { in X86FastEmitStore()
682 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc)); in X86FastEmitStore()
701 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, in X86FastEmitExtend() argument
704 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, Src); in X86FastEmitExtend()
765 unsigned Opc = 0; in handleConstantAddresses() local
776 Opc = X86::MOV64rm; in handleConstantAddresses()
779 Opc = X86::MOV32rm; in handleConstantAddresses()
789 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), LoadReg); in handleConstantAddresses()
2142 unsigned Opc = X86::getCMovOpcode(TRI.getRegSizeInBits(*RC)/8); in X86FastEmitCMoveSelect() local
2143 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitCMoveSelect()
2255 const uint16_t *Opc = nullptr; in X86FastEmitSSESelect() local
2258 case MVT::f32: Opc = &OpcTable[0][0]; break; in X86FastEmitSSESelect()
2259 case MVT::f64: Opc = &OpcTable[1][0]; break; in X86FastEmitSSESelect()
2263 Register CmpReg = fastEmitInst_rri(Opc[0], RC, CmpLHSReg, CmpRHSReg, CC); in X86FastEmitSSESelect()
2264 Register AndReg = fastEmitInst_rr(Opc[1], VR128, CmpReg, LHSReg); in X86FastEmitSSESelect()
2265 Register AndNReg = fastEmitInst_rr(Opc[2], VR128, CmpReg, RHSReg); in X86FastEmitSSESelect()
2266 Register OrReg = fastEmitInst_rr(Opc[3], VR128, AndNReg, AndReg); in X86FastEmitSSESelect()
2278 unsigned Opc; in X86FastEmitPseudoSelect() local
2281 case MVT::i8: Opc = X86::CMOV_GR8; break; in X86FastEmitPseudoSelect()
2282 case MVT::i16: Opc = X86::CMOV_GR16; break; in X86FastEmitPseudoSelect()
2283 case MVT::i32: Opc = X86::CMOV_GR32; break; in X86FastEmitPseudoSelect()
2285 Opc = Subtarget->hasAVX512() ? X86::CMOV_FR16X : X86::CMOV_FR16; break; in X86FastEmitPseudoSelect()
2287 Opc = Subtarget->hasAVX512() ? X86::CMOV_FR32X : X86::CMOV_FR32; break; in X86FastEmitPseudoSelect()
2289 Opc = Subtarget->hasAVX512() ? X86::CMOV_FR64X : X86::CMOV_FR64; break; in X86FastEmitPseudoSelect()
2344 fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitPseudoSelect()
2494 unsigned Opc = in X86SelectFPExt() local
2497 return X86SelectFPExtOrFPTrunc(I, Opc, TLI.getRegClassFor(MVT::f64)); in X86SelectFPExt()
2508 unsigned Opc = in X86SelectFPTrunc() local
2511 return X86SelectFPExtOrFPTrunc(I, Opc, TLI.getRegClassFor(MVT::f32)); in X86SelectFPTrunc()
2622 unsigned Opc = Subtarget->hasVLX() ? X86::VCVTPS2PHZ128rr in fastLowerIntrinsicCall() local
2624 InputReg = fastEmitInst_ri(Opc, RC, InputReg, 4); in fastLowerIntrinsicCall()
2627 Opc = Subtarget->hasAVX512() ? X86::VMOVPDI2DIZrr in fastLowerIntrinsicCall()
2630 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) in fastLowerIntrinsicCall()
2645 unsigned Opc = Subtarget->hasVLX() ? X86::VCVTPH2PSZ128rr in fastLowerIntrinsicCall() local
2647 InputReg = fastEmitInst_r(Opc, RC, InputReg); in fastLowerIntrinsicCall()
2671 unsigned Opc; in fastLowerIntrinsicCall() local
2676 case MVT::i32: Opc = X86::MOV32rm; RC = &X86::GR32RegClass; break; in fastLowerIntrinsicCall()
2677 case MVT::i64: Opc = X86::MOV64rm; RC = &X86::GR64RegClass; break; in fastLowerIntrinsicCall()
2707 TII.get(Opc), DestReg), SrcReg); in fastLowerIntrinsicCall()
2813 unsigned Opc; in fastLowerIntrinsicCall() local
2816 case MVT::f32: Opc = SqrtOpc[AVXLevel][0]; break; in fastLowerIntrinsicCall()
2817 case MVT::f64: Opc = SqrtOpc[AVXLevel][1]; break; in fastLowerIntrinsicCall()
2836 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), in fastLowerIntrinsicCall()
2900 static const uint16_t Opc[2][4] = { in fastLowerIntrinsicCall() local
2911 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg) in fastLowerIntrinsicCall()
3002 unsigned Opc; in fastLowerIntrinsicCall() local
3005 case MVT::i32: Opc = CvtOpc[AVXLevel][IsInputDouble][0]; break; in fastLowerIntrinsicCall()
3006 case MVT::i64: Opc = CvtOpc[AVXLevel][IsInputDouble][1]; break; in fastLowerIntrinsicCall()
3029 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) in fastLowerIntrinsicCall()
3562 unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64; in fastLowerCall() local
3566 TII.get(Opc)), FI) in fastLowerCall()
3568 Opc = ResVT == MVT::f32 ? X86::MOVSSrm_alt : X86::MOVSDrm_alt; in fastLowerCall()
3570 TII.get(Opc), ResultReg + i), FI); in fastLowerCall()
3695 unsigned Opc = 0; in X86MaterializeInt() local
3701 case MVT::i8: Opc = X86::MOV8ri; break; in X86MaterializeInt()
3702 case MVT::i16: Opc = X86::MOV16ri; break; in X86MaterializeInt()
3703 case MVT::i32: Opc = X86::MOV32ri; break; in X86MaterializeInt()
3706 Opc = X86::MOV32ri64; in X86MaterializeInt()
3708 Opc = X86::MOV64ri32; in X86MaterializeInt()
3710 Opc = X86::MOV64ri; in X86MaterializeInt()
3714 return fastEmitInst_i(Opc, TLI.getRegClassFor(VT), Imm); in X86MaterializeInt()
3727 unsigned Opc = 0; in X86MaterializeFP() local
3735 Opc = HasAVX512 ? X86::VMOVSSZrm_alt in X86MaterializeFP()
3741 Opc = HasAVX512 ? X86::VMOVSDZrm_alt in X86MaterializeFP()
3775 TII.get(Opc), ResultReg); in X86MaterializeFP()
3785 TII.get(Opc), ResultReg), in X86MaterializeFP()
3813 unsigned Opc = in X86MaterializeGV() local
3818 TII.get(Opc), ResultReg), AM); in X86MaterializeGV()
3840 unsigned Opc = 0; in fastMaterializeConstant() local
3846 Opc = X86::LD_Fp032; in fastMaterializeConstant()
3850 Opc = X86::LD_Fp064; in fastMaterializeConstant()
3853 Opc = X86::LD_Fp080; in fastMaterializeConstant()
3857 if (Opc) { in fastMaterializeConstant()
3859 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), in fastMaterializeConstant()
3883 unsigned Opc = in fastMaterializeAlloca() local
3890 TII.get(Opc), ResultReg), AM); in fastMaterializeAlloca()
3903 unsigned Opc = 0; in fastMaterializeFloatZero() local
3907 Opc = HasAVX512 ? X86::AVX512_FsFLD0SH : X86::FsFLD0SH; in fastMaterializeFloatZero()
3910 Opc = HasAVX512 ? X86::AVX512_FsFLD0SS in fastMaterializeFloatZero()
3915 Opc = HasAVX512 ? X86::AVX512_FsFLD0SD in fastMaterializeFloatZero()
3925 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in fastMaterializeFloatZero()