1737         Register OpReg = getRegForValue(TI->getOperand(0));  in X86SelectBranch()  local
1738         if (OpReg == 0) return false;  in X86SelectBranch()
1741           .addReg(OpReg).addImm(1);  in X86SelectBranch()
1772   Register OpReg = getRegForValue(BI->getCondition());  in X86SelectBranch()  local
1773   if (OpReg == 0) return false;  in X86SelectBranch()
1776   if (MRI.getRegClass(OpReg) == &X86::VK1RegClass) {  in X86SelectBranch()
1777     unsigned KOpReg = OpReg;  in X86SelectBranch()
1778     OpReg = createResultReg(&X86::GR32RegClass);  in X86SelectBranch()
1780             TII.get(TargetOpcode::COPY), OpReg)  in X86SelectBranch()
1782     OpReg = fastEmitInst_extractsubreg(MVT::i8, OpReg, X86::sub_8bit);  in X86SelectBranch()
1785       .addReg(OpReg)  in X86SelectBranch()
1794   unsigned CReg = 0, OpReg = 0;  in X86SelectShift()  local
1800     case Instruction::LShr: OpReg = X86::SHR8rCL; break;  in X86SelectShift()
1801     case Instruction::AShr: OpReg = X86::SAR8rCL; break;  in X86SelectShift()
1802     case Instruction::Shl:  OpReg = X86::SHL8rCL; break;  in X86SelectShift()
1810     case Instruction::LShr: OpReg = X86::SHR16rCL; break;  in X86SelectShift()
1811     case Instruction::AShr: OpReg = X86::SAR16rCL; break;  in X86SelectShift()
1812     case Instruction::Shl:  OpReg = X86::SHL16rCL; break;  in X86SelectShift()
1819     case Instruction::LShr: OpReg = X86::SHR32rCL; break;  in X86SelectShift()
1820     case Instruction::AShr: OpReg = X86::SAR32rCL; break;  in X86SelectShift()
1821     case Instruction::Shl:  OpReg = X86::SHL32rCL; break;  in X86SelectShift()
1828     case Instruction::LShr: OpReg = X86::SHR64rCL; break;  in X86SelectShift()
1829     case Instruction::AShr: OpReg = X86::SAR64rCL; break;  in X86SelectShift()
1830     case Instruction::Shl:  OpReg = X86::SHL64rCL; break;  in X86SelectShift()
1856   BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(OpReg), ResultReg)  in X86SelectShift()
2365       Register OpReg = getRegForValue(Opnd);  in X86SelectSelect()  local
2366       if (OpReg == 0)  in X86SelectSelect()
2372         .addReg(OpReg);  in X86SelectSelect()
2410   Register OpReg = getRegForValue(I->getOperand(0));  in X86SelectIntToFP()  local
2411   if (OpReg == 0)  in X86SelectIntToFP()
2442   Register ResultReg = fastEmitInst_rr(Opcode, RC, ImplicitDefReg, OpReg);  in X86SelectIntToFP()
2464   Register OpReg = getRegForValue(I->getOperand(0));  in X86SelectFPExtOrFPTrunc()  local
2465   if (OpReg == 0)  in X86SelectFPExtOrFPTrunc()
2484   MIB.addReg(OpReg);  in X86SelectFPExtOrFPTrunc()