1794 static void translateRegister(MCInst &mcInst, Reg reg) {  in translateRegister()  argument
1800   mcInst.addOperand(MCOperand::createReg(llvmRegnum));  in translateRegister()
1817 static bool translateSrcIndex(MCInst &mcInst, InternalInstruction &insn) {  in translateSrcIndex()  argument
1829   mcInst.addOperand(baseReg);  in translateSrcIndex()
1833   mcInst.addOperand(segmentReg);  in translateSrcIndex()
1842 static bool translateDstIndex(MCInst &mcInst, InternalInstruction &insn) {  in translateDstIndex()  argument
1854   mcInst.addOperand(baseReg);  in translateDstIndex()
1864 static void translateImmediate(MCInst &mcInst, uint64_t immediate,  in translateImmediate()  argument
1938     mcInst.addOperand(MCOperand::createReg(X86::XMM0 + (immediate >> 4)));  in translateImmediate()
1941     mcInst.addOperand(MCOperand::createReg(X86::YMM0 + (immediate >> 4)));  in translateImmediate()
1944     mcInst.addOperand(MCOperand::createReg(X86::ZMM0 + (immediate >> 4)));  in translateImmediate()
1952           mcInst, immediate + pcrel, insn.startLocation, isBranch,  in translateImmediate()
1954     mcInst.addOperand(MCOperand::createImm(immediate));  in translateImmediate()
1959     mcInst.addOperand(segmentReg);  in translateImmediate()
1969 static bool translateRMRegister(MCInst &mcInst,  in translateRMRegister()  argument
1991     mcInst.addOperand(MCOperand::createReg(X86::x)); break;  in translateRMRegister()
2008 static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn,  in translateRMMemory()  argument
2150   mcInst.addOperand(baseReg);  in translateRMMemory()
2151   mcInst.addOperand(scaleAmount);  in translateRMMemory()
2152   mcInst.addOperand(indexReg);  in translateRMMemory()
2158           mcInst, insn.displacement + pcrel, insn.startLocation, false,  in translateRMMemory()
2160     mcInst.addOperand(displacement);  in translateRMMemory()
2161   mcInst.addOperand(segmentReg);  in translateRMMemory()
2173 static bool translateRM(MCInst &mcInst, const OperandSpecifier &operand,  in translateRM()  argument
2194     return translateRMRegister(mcInst, insn);  in translateRM()
2199     return translateRMMemory(mcInst, insn, Dis);  in translateRM()
2201     return translateRMMemory(mcInst, insn, Dis, true);  in translateRM()
2210 static void translateFPRegister(MCInst &mcInst,  in translateFPRegister()  argument
2212   mcInst.addOperand(MCOperand::createReg(X86::ST0 + stackPos));  in translateFPRegister()
2221 static bool translateMaskRegister(MCInst &mcInst,  in translateMaskRegister()  argument
2228   mcInst.addOperand(MCOperand::createReg(X86::K0 + maskRegNum));  in translateMaskRegister()
2239 static bool translateOperand(MCInst &mcInst, const OperandSpecifier &operand,  in translateOperand()  argument
2247     translateRegister(mcInst, insn.reg);  in translateOperand()
2250     return translateMaskRegister(mcInst, insn.writemask);  in translateOperand()
2254     return translateRM(mcInst, operand, insn, Dis);  in translateOperand()
2261     translateImmediate(mcInst,  in translateOperand()
2268     mcInst.addOperand(MCOperand::createImm(insn.RC));  in translateOperand()
2271     return translateSrcIndex(mcInst, insn);  in translateOperand()
2273     return translateDstIndex(mcInst, insn);  in translateOperand()
2279     translateRegister(mcInst, insn.opcodeRegister);  in translateOperand()
2282     mcInst.addOperand(MCOperand::createImm(insn.immediates[1]));  in translateOperand()
2285     translateFPRegister(mcInst, insn.modRM & 7);  in translateOperand()
2288     translateRegister(mcInst, insn.vvvv);  in translateOperand()
2291     return translateOperand(mcInst, insn.operands[operand.type - TYPE_DUP0],  in translateOperand()
2302 static bool translateInstruction(MCInst &mcInst,  in translateInstruction()  argument
2310   mcInst.clear();  in translateInstruction()
2311   mcInst.setOpcode(insn.instructionID);  in translateInstruction()
2316     if(mcInst.getOpcode() == X86::REP_PREFIX)  in translateInstruction()
2317       mcInst.setOpcode(X86::XRELEASE_PREFIX);  in translateInstruction()
2318     else if(mcInst.getOpcode() == X86::REPNE_PREFIX)  in translateInstruction()
2319       mcInst.setOpcode(X86::XACQUIRE_PREFIX);  in translateInstruction()
2326       if (translateOperand(mcInst, Op, insn, Dis)) {  in translateInstruction()