Lines Matching refs:BitSize
2527 static unsigned getTestUnderMaskCond(unsigned BitSize, unsigned CCMask, in getTestUnderMaskCond() argument
2665 unsigned BitSize = NewC.Op0.getValueSizeInBits(); in adjustForTestUnderMask() local
2672 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, in adjustForTestUnderMask()
2683 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, in adjustForTestUnderMask()
2690 NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal, in adjustForTestUnderMask()
4107 int64_t BitSize = (int64_t)1 << Log2_32_Ceil(NumSignificantBits); in lowerCTPOP() local
4108 BitSize = std::min(BitSize, OrigBitSize); in lowerCTPOP()
4117 for (int64_t I = BitSize / 2; I >= 8; I = I / 2) { in lowerCTPOP()
4119 if (BitSize != OrigBitSize) in lowerCTPOP()
4121 DAG.getConstant(((uint64_t)1 << BitSize) - 1, DL, VT)); in lowerCTPOP()
4126 if (BitSize > 8) in lowerCTPOP()
4128 DAG.getConstant(BitSize - 8, DL, VT)); in lowerCTPOP()
4191 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_LOAD_OP() local
4228 DAG.getConstant(32 - BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
4232 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
4237 DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_LOAD_OP()
4244 DAG.getConstant(BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
4319 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_CMP_SWAP() local
4340 NegBitShift, DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_CMP_SWAP()
7779 unsigned BitSize, bool Invert) const { in emitAtomicLoadBinary() argument
7783 bool IsSubWord = (BitSize < 32); in emitAtomicLoadBinary()
7795 BitSize = MI.getOperand(6).getImm(); in emitAtomicLoadBinary()
7798 const TargetRegisterClass *RC = (BitSize <= 32 ? in emitAtomicLoadBinary()
7801 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG; in emitAtomicLoadBinary()
7802 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG; in emitAtomicLoadBinary()
7849 if (BitSize <= 32) in emitAtomicLoadBinary()
7852 .addReg(Tmp).addImm(-1U << (32 - BitSize)); in emitAtomicLoadBinary()
7871 .addImm(32).addImm(31 + BitSize).addImm(32 - BitSize); in emitAtomicLoadBinary()
7897 unsigned KeepOldMask, unsigned BitSize) const { in emitAtomicLoadMinMax()
7901 bool IsSubWord = (BitSize < 32); in emitAtomicLoadMinMax()
7912 BitSize = MI.getOperand(6).getImm(); in emitAtomicLoadMinMax()
7915 const TargetRegisterClass *RC = (BitSize <= 32 ? in emitAtomicLoadMinMax()
7918 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG; in emitAtomicLoadMinMax()
7919 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG; in emitAtomicLoadMinMax()
7975 .addImm(32).addImm(31 + BitSize).addImm(0); in emitAtomicLoadMinMax()
8023 int64_t BitSize = MI.getOperand(7).getImm(); in emitAtomicCmpSwapW() local
8031 unsigned ZExtOpcode = BitSize == 8 ? SystemZ::LLCR : SystemZ::LLHR; in emitAtomicCmpSwapW()
8081 .addReg(OldVal).addReg(BitShift).addImm(BitSize); in emitAtomicCmpSwapW()
8083 .addReg(SwapVal).addReg(OldValRot).addImm(32).addImm(63 - BitSize).addImm(0); in emitAtomicCmpSwapW()
8102 .addReg(RetrySwapVal).addReg(NegBitShift).addImm(-BitSize); in emitAtomicCmpSwapW()