Lines Matching refs:LowGPR
184 unsigned LowGPR = 0; in assignCalleeSavedSpillSlots() local
192 LowGPR = Reg; in assignCalleeSavedSpillSlots()
204 ZFI->setRestoreGPRRegs(LowGPR, HighGPR, StartSPOffset); in assignCalleeSavedSpillSlots()
214 LowGPR = Reg; StartSPOffset = Offset; in assignCalleeSavedSpillSlots()
218 ZFI->setSpillGPRRegs(LowGPR, HighGPR, StartSPOffset); in assignCalleeSavedSpillSlots()
339 if (SpillGPRs.LowGPR) { in spillCalleeSavedRegisters()
340 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR && in spillCalleeSavedRegisters()
347 addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false); in spillCalleeSavedRegisters()
411 if (RestoreGPRs.LowGPR) { in restoreCalleeSavedRegisters()
415 assert(RestoreGPRs.LowGPR != RestoreGPRs.HighGPR && in restoreCalleeSavedRegisters()
422 MIB.addReg(RestoreGPRs.LowGPR, RegState::Define); in restoreCalleeSavedRegisters()
432 if (Reg != RestoreGPRs.LowGPR && Reg != RestoreGPRs.HighGPR && in restoreCalleeSavedRegisters()
479 ZFI->getRestoreGPRRegs().LowGPR != SystemZ::R6D) in processFunctionBeforeFrameFinalized()
576 if (ZFI->getSpillGPRRegs().LowGPR) { in emitPrologue()
717 if (ZFI->getRestoreGPRRegs().LowGPR) { in emitEpilogue()
1083 if (SpillGPRs.LowGPR) { in spillCalleeSavedRegisters()
1084 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR && in spillCalleeSavedRegisters()
1091 addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false); in spillCalleeSavedRegisters()
1158 if (RestoreGPRs.LowGPR) { in restoreCalleeSavedRegisters()
1160 if (RestoreGPRs.LowGPR == RestoreGPRs.HighGPR) in restoreCalleeSavedRegisters()
1162 BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LG), RestoreGPRs.LowGPR) in restoreCalleeSavedRegisters()
1171 MIB.addReg(RestoreGPRs.LowGPR, RegState::Define); in restoreCalleeSavedRegisters()
1181 if (Reg > RestoreGPRs.LowGPR && Reg < RestoreGPRs.HighGPR) in restoreCalleeSavedRegisters()
1211 if (ZFI->getSpillGPRRegs().LowGPR) { in emitPrologue()
1296 if (ZFI->getRestoreGPRRegs().LowGPR != SPReg) { in emitEpilogue()