SystemZAsmPrinter.cpp - OpenGrok cross reference for /llvm-project-15.0.7/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp

Lines Matching refs:getReg
36       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))  in lowerRILow()
40       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))  in lowerRILow()
41       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg()))  in lowerRILow()
50       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))  in lowerRIHigh()
54       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))  in lowerRIHigh()
55       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg()))  in lowerRIHigh()
63     .addReg(MI->getOperand(0).getReg())  in lowerRIEfLow()
64     .addReg(MI->getOperand(1).getReg())  in lowerRIEfLow()
65     .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()))  in lowerRIEfLow()
116     .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))  in lowerSubvectorLoad()
117     .addReg(MI->getOperand(1).getReg())  in lowerSubvectorLoad()
119     .addReg(MI->getOperand(3).getReg());  in lowerSubvectorLoad()
126     .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))  in lowerSubvectorStore()
127     .addReg(MI->getOperand(1).getReg())  in lowerSubvectorStore()
129     .addReg(MI->getOperand(3).getReg())  in lowerSubvectorStore()
182       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
183       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
191       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
192       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
200       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
209       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
218       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
219       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
227       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
228       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
236       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
245       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
264                                      .addReg(MI->getOperand(0).getReg()));  in emitInstruction()
271                                      .addReg(MI->getOperand(0).getReg()));  in emitInstruction()
284       .addReg(MI->getOperand(0).getReg());  in emitInstruction()
301       .addReg(MI->getOperand(0).getReg());  in emitInstruction()
308       .addReg(MI->getOperand(2).getReg());  in emitInstruction()
313       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
314       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
316       .addReg(MI->getOperand(3).getReg())  in emitInstruction()
322       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
323       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
325       .addReg(MI->getOperand(3).getReg())  in emitInstruction()
331       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
334       .addReg(MI->getOperand(3).getReg())  in emitInstruction()
340       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
343       .addReg(MI->getOperand(3).getReg())  in emitInstruction()
349       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
350       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
352       .addReg(MI->getOperand(3).getReg())  in emitInstruction()
358       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
359       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
361       .addReg(MI->getOperand(3).getReg())  in emitInstruction()
367       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
370       .addReg(MI->getOperand(3).getReg())  in emitInstruction()
376       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
379       .addReg(MI->getOperand(3).getReg())  in emitInstruction()
399       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
405       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))  in emitInstruction()
411       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))  in emitInstruction()
427       .addReg(MI->getOperand(0).getReg())  in emitInstruction()
428       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(1).getReg()))  in emitInstruction()
429       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()));  in emitInstruction()
435       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))  in emitInstruction()
436       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg()));  in emitInstruction()
477       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(0).getReg()))  in emitInstruction()
478       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg()))  in emitInstruction()
484       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))  in emitInstruction()
485       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))  in emitInstruction()
486       .addReg(MI->getOperand(1).getReg())  in emitInstruction()
582     Register LenMinus1Reg = MI->getOperand(1).getReg();  in emitInstruction()
583     Register DestReg = MI->getOperand(2).getReg();  in emitInstruction()
585     Register SrcReg = MI->getOperand(4).getReg();  in emitInstruction()
723         ScratchReg = MI.getOperand(ScratchIdx).getReg();  in LowerPATCHPOINT()
796         SystemZ::GR128BitRegClass.contains(MO.getReg()))  in PrintAsmOperand()
798           MCOperand::createReg(MRI.getSubReg(MO.getReg(), SystemZ::subreg_l64));  in PrintAsmOperand()
814     printAddress(MAI, MI->getOperand(OpNo).getReg(),  in PrintAsmMemoryOperand()
816                  MI->getOperand(OpNo + 2).getReg(), OS);  in PrintAsmMemoryOperand()
948     unsigned Reg = CS.getReg();  in emitPPA1()