Lines Matching refs:addReg
36 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg())) in lowerRILow()
40 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg())) in lowerRILow()
41 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg())) in lowerRILow()
50 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in lowerRIHigh()
54 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in lowerRIHigh()
55 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg())) in lowerRIHigh()
63 .addReg(MI->getOperand(0).getReg()) in lowerRIEfLow()
64 .addReg(MI->getOperand(1).getReg()) in lowerRIEfLow()
65 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg())) in lowerRIEfLow()
116 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in lowerSubvectorLoad()
117 .addReg(MI->getOperand(1).getReg()) in lowerSubvectorLoad()
119 .addReg(MI->getOperand(3).getReg()); in lowerSubvectorLoad()
126 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in lowerSubvectorStore()
127 .addReg(MI->getOperand(1).getReg()) in lowerSubvectorStore()
129 .addReg(MI->getOperand(3).getReg()) in lowerSubvectorStore()
142 .addReg(SystemZMC::GR64Regs[static_cast<unsigned>(CT)])); in emitCallInformation()
154 .addReg(SystemZ::R14D); in emitInstruction()
159 .addReg(SystemZ::R7D) in emitInstruction()
161 .addReg(0); in emitInstruction()
168 .addReg(SystemZ::R14D); in emitInstruction()
175 .addReg(SystemZ::R7D) in emitInstruction()
177 .addReg(0); in emitInstruction()
182 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
183 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
185 .addReg(SystemZ::R14D) in emitInstruction()
191 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
192 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
194 .addReg(SystemZ::R14D) in emitInstruction()
200 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
203 .addReg(SystemZ::R14D) in emitInstruction()
209 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
212 .addReg(SystemZ::R14D) in emitInstruction()
218 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
219 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
221 .addReg(SystemZ::R14D) in emitInstruction()
227 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
228 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
230 .addReg(SystemZ::R14D) in emitInstruction()
236 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
239 .addReg(SystemZ::R14D) in emitInstruction()
245 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
248 .addReg(SystemZ::R14D) in emitInstruction()
255 .addReg(SystemZ::R7D) in emitInstruction()
263 .addReg(SystemZ::R7D) in emitInstruction()
264 .addReg(MI->getOperand(0).getReg())); in emitInstruction()
270 .addReg(SystemZ::R3D) in emitInstruction()
271 .addReg(MI->getOperand(0).getReg())); in emitInstruction()
277 .addReg(SystemZ::R14D) in emitInstruction()
283 .addReg(SystemZ::R14D) in emitInstruction()
284 .addReg(MI->getOperand(0).getReg()); in emitInstruction()
301 .addReg(MI->getOperand(0).getReg()); in emitInstruction()
308 .addReg(MI->getOperand(2).getReg()); in emitInstruction()
313 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
314 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
316 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
322 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
323 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
325 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
331 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
334 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
340 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
343 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
349 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
350 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
352 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
358 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
359 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
361 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
367 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
370 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
376 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
379 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
385 .addReg(SystemZ::R14D) in emitInstruction()
392 .addReg(SystemZ::R14D) in emitInstruction()
399 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
405 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg())) in emitInstruction()
411 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in emitInstruction()
427 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
428 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(1).getReg())) in emitInstruction()
429 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg())); in emitInstruction()
435 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
436 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg())); in emitInstruction()
477 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(0).getReg())) in emitInstruction()
478 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg())) in emitInstruction()
479 .addReg(0).addImm(0); in emitInstruction()
484 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
485 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
486 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
487 .addReg(0).addImm(0); in emitInstruction()
527 .addImm(14).addReg(SystemZ::R0D); in emitInstruction()
530 .addImm(15).addReg(SystemZ::R0D); in emitInstruction()
590 MCInst ET = MCInstBuilder(TargetInsOpc).addReg(DestReg) in emitInstruction()
591 .addImm(DestDisp).addImm(1).addReg(SrcReg).addImm(SrcDisp); in emitInstruction()
602 MCInstBuilder(SystemZ::EXRL).addReg(LenMinus1Reg).addExpr(Dot)); in emitInstruction()
623 MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI); in EmitNop()
628 MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0), in EmitNop()
664 MCInstBuilder(SystemZ::BRASL).addReg(SystemZ::R0D).addExpr(Op), in LowerFENTRY_CALL()
728 .addReg(ScratchReg) in LowerPATCHPOINT()
733 .addReg(ScratchReg) in LowerPATCHPOINT()
739 .addReg(SystemZ::R14D) in LowerPATCHPOINT()
740 .addReg(ScratchReg)); in LowerPATCHPOINT()
746 .addReg(SystemZ::R14D) in LowerPATCHPOINT()