Lines Matching refs:rd
165 def TLS_ADDXrr : F3_1<2, 0b000000, (outs I64Regs:$rd),
167 "add $rs1, $rs2, $rd, $sym",
168 [(set i64:$rd,
192 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
193 "mulx $rs1, $rs2, $rd",
194 [(set i64:$rd, (mul i64:$rs1, i64:$rs2))]>;
196 (outs IntRegs:$rd), (ins IntRegs:$rs1, i64imm:$simm13),
197 "mulx $rs1, $simm13, $rd",
198 [(set i64:$rd, (mul i64:$rs1, (i64 simm13:$simm13)))]>;
203 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
204 "sdivx $rs1, $rs2, $rd",
205 [(set i64:$rd, (sdiv i64:$rs1, i64:$rs2))]>;
207 (outs IntRegs:$rd), (ins IntRegs:$rs1, i64imm:$simm13),
208 "sdivx $rs1, $simm13, $rd",
209 [(set i64:$rd, (sdiv i64:$rs1, (i64 simm13:$simm13)))]>;
212 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
213 "udivx $rs1, $rs2, $rd",
214 [(set i64:$rd, (udiv i64:$rs1, i64:$rs2))]>;
216 (outs IntRegs:$rd), (ins IntRegs:$rs1, i64imm:$simm13),
217 "udivx $rs1, $simm13, $rd",
218 [(set i64:$rd, (udiv i64:$rs1, (i64 simm13:$simm13)))]>;
322 let Uses = [ICC], Constraints = "$f = $rd" in {
324 def MOVXCCrr : F4_1<0b101100, (outs IntRegs:$rd),
326 "mov$cond %xcc, $rs2, $rd",
327 [(set i32:$rd,
329 def MOVXCCri : F4_2<0b101100, (outs IntRegs:$rd),
331 "mov$cond %xcc, $simm11, $rd",
332 [(set i32:$rd,
337 def FMOVS_XCC : F4_3<0b110101, 0b000001, (outs FPRegs:$rd),
339 "fmovs$cond %xcc, $rs2, $rd",
340 [(set f32:$rd,
342 def FMOVD_XCC : F4_3<0b110101, 0b000010, (outs DFPRegs:$rd),
344 "fmovd$cond %xcc, $rs2, $rd",
345 [(set f64:$rd,
348 def FMOVQ_XCC : F4_3<0b110101, 0b000011, (outs QFPRegs:$rd),
350 "fmovq$cond %xcc, $rs2, $rd",
351 [(set f128:$rd,
392 def rr : F4_4r<0b101111, 0b00000, rcond, (outs I64Regs:$rd),
394 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
396 def ri : F4_4i<0b101111, rcond, (outs I64Regs:$rd),
398 !strconcat(OpcStr, " $rs1, $simm10, $rd"), []>;
412 (outs FPRegs:$rd), (ins I64Regs:$rs1, FPRegs:$rs2),
413 !strconcat(!strconcat("fmovrs", OpcStr)," $rs1, $rs2, $rd"),
416 (outs FPRegs:$rd), (ins I64Regs:$rs1, FPRegs:$rs2),
417 !strconcat(!strconcat("fmovrd", OpcStr)," $rs1, $rs2, $rd"),
420 (outs FPRegs:$rd), (ins I64Regs:$rs1, FPRegs:$rs2),
421 !strconcat(!strconcat("fmovrq", OpcStr)," $rs1, $rs2, $rd"),
441 (outs FPRegs:$rd), (ins DFPRegs:$rs2),
442 "fxtos $rs2, $rd",
443 [(set FPRegs:$rd, (SPxtof DFPRegs:$rs2))]>;
445 (outs DFPRegs:$rd), (ins DFPRegs:$rs2),
446 "fxtod $rs2, $rd",
447 [(set DFPRegs:$rd, (SPxtof DFPRegs:$rs2))]>;
450 (outs QFPRegs:$rd), (ins DFPRegs:$rs2),
451 "fxtoq $rs2, $rd",
452 [(set QFPRegs:$rd, (SPxtof DFPRegs:$rs2))]>;
455 (outs DFPRegs:$rd), (ins FPRegs:$rs2),
456 "fstox $rs2, $rd",
457 [(set DFPRegs:$rd, (SPftox FPRegs:$rs2))]>;
459 (outs DFPRegs:$rd), (ins DFPRegs:$rs2),
460 "fdtox $rs2, $rd",
461 [(set DFPRegs:$rd, (SPftox DFPRegs:$rs2))]>;
464 (outs DFPRegs:$rd), (ins QFPRegs:$rs2),
465 "fqtox $rs2, $rd",
466 [(set DFPRegs:$rd, (SPftox QFPRegs:$rs2))]>;
491 (outs IntRegs:$rd), (ins i64imm:$imm22),
492 "sethi $imm22, $rd",
493 [(set i64:$rd, SETHIimm:$imm22)]>;
497 let Predicates = [Is64Bit], Constraints = "$swap = $rd", asi = 0b10000000 in {
499 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2,
501 "casx [$rs1], $rs2, $rd",
502 [(set i64:$rd,