Lines Matching refs:Fixups
57 SmallVectorImpl<MCFixup> &Fixups,
63 SmallVectorImpl<MCFixup> &Fixups,
69 SmallVectorImpl<MCFixup> &Fixups,
72 SmallVectorImpl<MCFixup> &Fixups,
75 SmallVectorImpl<MCFixup> &Fixups,
78 SmallVectorImpl<MCFixup> &Fixups,
81 SmallVectorImpl<MCFixup> &Fixups,
84 SmallVectorImpl<MCFixup> &Fixups,
91 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
93 unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
112 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
122 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue() argument
134 Fixups.push_back(MCFixup::create(0, Expr, Kind)); in getMachineOpValue()
148 SmallVectorImpl<MCFixup> &Fixups, in getSImm13OpValue() argument
173 Fixups.push_back(MCFixup::create(0, Expr, Kind)); in getSImm13OpValue()
179 SmallVectorImpl<MCFixup> &Fixups, in getCallTargetOpValue() argument
200 Fixups.push_back(MCFixup::create(0, Expr, Kind)); in getCallTargetOpValue()
206 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue() argument
210 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
212 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getBranchTargetOpValue()
219 SmallVectorImpl<MCFixup> &Fixups, in getBranchPredTargetOpValue() argument
223 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
225 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getBranchPredTargetOpValue()
232 SmallVectorImpl<MCFixup> &Fixups, in getBranchOnRegTargetOpValue() argument
236 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
238 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getBranchOnRegTargetOpValue()
240 Fixups.push_back(MCFixup::create(0, MO.getExpr(), in getBranchOnRegTargetOpValue()