53                              MI.getOperand(3).getMetadata()->getOperand(0))  in addConstantsToTrack()
58           GR->add(GV, &MF, MI.getOperand(2).getReg());  in addConstantsToTrack()
65             auto *BuildVec = MRI.getVRegDef(MI.getOperand(2).getReg());  in addConstantsToTrack()
70                       BuildVec->getOperand(1 + i).getReg());  in addConstantsToTrack()
72           GR->add(Const, &MF, MI.getOperand(2).getReg());  in addConstantsToTrack()
77           assert(MI.getOperand(2).isReg() && "Reg operand is expected");  in addConstantsToTrack()
78           MachineInstr *SrcMI = MRI.getVRegDef(MI.getOperand(2).getReg());  in addConstantsToTrack()
86     Register Reg = MI->getOperand(2).getReg();  in addConstantsToTrack()
89     MRI.replaceRegWith(MI->getOperand(0).getReg(), Reg);  in addConstantsToTrack()
105       while (MI.getOperand(NumOp).isReg()) {  in foldConstantsIntoIntrinsics()
106         MachineOperand &MOp = MI.getOperand(NumOp);  in foldConstantsIntoIntrinsics()
111             ConstMI->getOperand(1).getCImm()->getZExtValue()));  in foldConstantsIntoIntrinsics()
112         if (MRI.use_empty(ConstMI->getOperand(0).getReg()))  in foldConstantsIntoIntrinsics()
128       assert(MI.getOperand(2).isReg());  in insertBitcasts()
130       MIB.buildBitcast(MI.getOperand(0).getReg(), MI.getOperand(2).getReg());  in insertBitcasts()
151   if (MI->getOperand(0).isReg()) {  in propagateSPIRVType()
152     Register Reg = MI->getOperand(0).getReg();  in propagateSPIRVType()
158         Type *Ty = MI->getOperand(1).getCImm()->getType();  in propagateSPIRVType()
164         Type *Ty = MI->getOperand(1).getGlobal()->getType();  in propagateSPIRVType()
172         MachineOperand &Op = MI->getOperand(1);  in propagateSPIRVType()
215   Def->getOperand(0).setReg(NewReg);  in insertAssignInstr()
235         Register Reg = MI.getOperand(1).getReg();  in generateAssignInstrs()
236         Type *Ty = getMDOperandAsType(MI.getOperand(2).getMetadata(), 0);  in generateAssignInstrs()
251         Register Reg = MI.getOperand(0).getReg();  in generateAssignInstrs()
260           Ty = MI.getOperand(1).getCImm()->getType();  in generateAssignInstrs()
262           Ty = MI.getOperand(1).getFPImm()->getType();  in generateAssignInstrs()
266           MachineInstr *ElemMI = MRI.getVRegDef(MI.getOperand(1).getReg());  in generateAssignInstrs()
270             ElemTy = ElemMI->getOperand(1).getCImm()->getType();  in generateAssignInstrs()
272             ElemTy = ElemMI->getOperand(1).getFPImm()->getType();  in generateAssignInstrs()
306       GR.getSPIRVTypeForVReg(SpvType->getOperand(1).getReg())->getOpcode() ==  in createNewIdReg()
328   assert(MI.getNumDefs() > 0 && MRI.hasOneUse(MI.getOperand(0).getReg()));  in processInstr()
330       *(MRI.use_instr_begin(MI.getOperand(0).getReg()));  in processInstr()
331   auto NewReg = createNewIdReg(MI.getOperand(0).getReg(), Opc, MRI, *GR).first;  in processInstr()
332   AssignTypeInst.getOperand(1).setReg(NewReg);  in processInstr()
333   MI.getOperand(0).setReg(NewReg);  in processInstr()
366       Register SrcReg = MI.getOperand(1).getReg();  in processInstrsWithTypeFolding()
369       Register DstReg = MI.getOperand(0).getReg();  in processInstrsWithTypeFolding()
406         assert(MI.getOperand(1).isReg());  in processSwitches()
407         Register Reg = MI.getOperand(1).getReg();  in processSwitches()
413       if (MI.getOpcode() == TargetOpcode::G_ICMP && MI.getOperand(2).isReg() &&  in processSwitches()
414           SwitchRegs.contains(MI.getOperand(2).getReg())) {  in processSwitches()
415         assert(MI.getOperand(0).isReg() && MI.getOperand(1).isPredicate() &&  in processSwitches()
416                MI.getOperand(3).isReg());  in processSwitches()
417         Register Dst = MI.getOperand(0).getReg();  in processSwitches()
426         Register CmpReg = MI.getOperand(2).getReg();  in processSwitches()
427         MachineOperand &PredOp = MI.getOperand(1);  in processSwitches()
431         uint64_t Val = getIConstVal(MI.getOperand(3).getReg(), &MRI);  in processSwitches()
434                CBr->getOperand(1).isMBB());  in processSwitches()
435         SwitchRegToMBB[CmpReg][Val] = CBr->getOperand(1).getMBB();  in processSwitches()
439                NextMI->getOperand(0).isMBB());  in processSwitches()
440         MachineBasicBlock *NextMBB = NextMI->getOperand(0).getMBB();  in processSwitches()
444             (NextMBB->front().getOperand(2).isReg() &&  in processSwitches()
445              NextMBB->front().getOperand(2).getReg() != CmpReg))  in processSwitches()
459       assert(MI.getOperand(1).isReg());  in processSwitches()
460       Register Reg = MI.getOperand(1).getReg();  in processSwitches()
465         Register CReg = MI.getOperand(i).getReg();  in processSwitches()
468         Vals.push_back(ConstInstr->getOperand(1).getCImm());  in processSwitches()