158   MachineInstr &OffsetTail = *MRI->getVRegDef(Reg);  in matchLargeOffset()  local
159   if (OffsetTail.getOpcode() == RISCV::ADDI ||  in matchLargeOffset()
160       OffsetTail.getOpcode() == RISCV::ADDIW) {  in matchLargeOffset()
163     MachineOperand &AddiImmOp = OffsetTail.getOperand(2);  in matchLargeOffset()
168         *MRI->getVRegDef(OffsetTail.getOperand(1).getReg());  in matchLargeOffset()
177     if (!ST->is64Bit() || OffsetTail.getOpcode() == RISCV::ADDIW)  in matchLargeOffset()
182     LLVM_DEBUG(dbgs() << "  Offset Instrs: " << OffsetTail  in matchLargeOffset()
184     DeadInstrs.insert(&OffsetTail);  in matchLargeOffset()
187   } else if (OffsetTail.getOpcode() == RISCV::LUI) {  in matchLargeOffset()
190     LLVM_DEBUG(dbgs() << "  Offset Instr: " << OffsetTail);  in matchLargeOffset()
191     Offset = SignExtend64<32>(OffsetTail.getOperand(1).getImm() << 12);  in matchLargeOffset()
192     DeadInstrs.insert(&OffsetTail);  in matchLargeOffset()
225   MachineInstr &OffsetTail = *MRI->getVRegDef(Rs1);  in matchShiftedOffset()  local
226   if (OffsetTail.getOpcode() != RISCV::ADDI)  in matchShiftedOffset()
228   if (!OffsetTail.getOperand(1).isReg() ||  in matchShiftedOffset()
229       OffsetTail.getOperand(1).getReg() != RISCV::X0 ||  in matchShiftedOffset()
230       !OffsetTail.getOperand(2).isImm())  in matchShiftedOffset()
233   Offset = OffsetTail.getOperand(2).getImm();  in matchShiftedOffset()
246   LLVM_DEBUG(dbgs() << "  Offset Instr: " << OffsetTail);  in matchShiftedOffset()
247   DeadInstrs.insert(&OffsetTail);  in matchShiftedOffset()