Lines Matching refs:RegImm
224 RegImmPair RegImm, in analyzeCompressibleUses() argument
241 if (CandidateRegImm.Reg == RegImm.Reg && in analyzeCompressibleUses()
242 CandidateRegImm.Imm == RegImm.Imm) { in analyzeCompressibleUses()
255 if (MI.modifiesRegister(RegImm.Reg, TRI)) in analyzeCompressibleUses()
264 if (MIs.size() < 2 || (RegImm.Imm != 0 && MIs.size() < 3)) in analyzeCompressibleUses()
272 if (RISCV::GPRRegClass.contains(RegImm.Reg)) in analyzeCompressibleUses()
274 else if (RISCV::FPR32RegClass.contains(RegImm.Reg)) in analyzeCompressibleUses()
276 else if (RISCV::FPR64RegClass.contains(RegImm.Reg)) in analyzeCompressibleUses()
343 RegImmPair RegImm = getRegImmPairPreventingCompression(MI); in runOnMachineFunction() local
344 if (!RegImm.Reg && RegImm.Imm == 0) in runOnMachineFunction()
351 Register NewReg = analyzeCompressibleUses(MI, RegImm, MIs); in runOnMachineFunction()
356 if (RISCV::GPRRegClass.contains(RegImm.Reg)) { in runOnMachineFunction()
357 assert(isInt<12>(RegImm.Imm)); in runOnMachineFunction()
359 .addReg(RegImm.Reg) in runOnMachineFunction()
360 .addImm(RegImm.Imm); in runOnMachineFunction()
366 assert(RegImm.Imm == 0); in runOnMachineFunction()
367 unsigned Opcode = RISCV::FPR32RegClass.contains(RegImm.Reg) in runOnMachineFunction()
371 .addReg(RegImm.Reg) in runOnMachineFunction()
372 .addReg(RegImm.Reg); in runOnMachineFunction()
381 updateOperands(*UpdateMI, RegImm, NewReg); in runOnMachineFunction()