408     Register AVLReg;  member
442     AVLReg = Reg;  in setAVLReg()
455     return AVLReg;  in getAVLReg()
585     if (Require.hasAVLReg() && Require.AVLReg == RISCV::NoRegister)  in isCompatible()
671       OS << "AVLReg=" << (unsigned)AVLReg;  in print()
885   Register AVLReg = Info.getAVLReg();  in insertVSETVLI()  local
886   if (AVLReg == RISCV::NoRegister) {  in insertVSETVLI()
906   if (AVLReg.isVirtual())  in insertVSETVLI()
907     MRI->constrainRegClass(AVLReg, &RISCV::GPRNoX0RegClass);  in insertVSETVLI()
914   if (AVLReg == RISCV::X0) {  in insertVSETVLI()
920       .addReg(AVLReg)  in insertVSETVLI()
933     Register AVLReg = MI.getOperand(1).getReg();  in getInfoForVSETVLI()  local
934     assert((AVLReg != RISCV::X0 || MI.getOperand(0).getReg() != RISCV::X0) &&  in getInfoForVSETVLI()
936     NewInfo.setAVLReg(AVLReg);  in getInfoForVSETVLI()
1146   Register AVLReg = Require.getAVLReg();  in needVSETVLIPHI()  local
1147   if (!AVLReg.isVirtual())  in needVSETVLIPHI()
1151   MachineInstr *PHI = MRI->getVRegDef(AVLReg);  in needVSETVLIPHI()