59       !Subtarget.hasStdExtF()) {  in RISCVTargetLowering()
91   if (Subtarget.hasStdExtF())  in RISCVTargetLowering()
346   if (Subtarget.hasStdExtF()) {  in RISCVTargetLowering()
357   if (Subtarget.hasStdExtF() && Subtarget.is64Bit())  in RISCVTargetLowering()
380   if (Subtarget.hasStdExtF()) {  in RISCVTargetLowering()
924       if (Subtarget.hasStdExtF())  in RISCVTargetLowering()
946   if (Subtarget.hasStdExtF())  in RISCVTargetLowering()
959   if (Subtarget.hasStdExtF())  in RISCVTargetLowering()
1349   if (VT == MVT::f32 && !Subtarget.hasStdExtF())  in isFPImmLegal()
1358          (VT == MVT::f32 && Subtarget.hasStdExtF()) ||  in hasBitPreservingFPLogic()
1368   if (VT == MVT::f16 && Subtarget.hasStdExtF() && !Subtarget.hasStdExtZfh())  in getRegisterTypeForCallingConv()
1380   if (VT == MVT::f16 && Subtarget.hasStdExtF() && !Subtarget.hasStdExtZfh())  in getNumRegistersForCallingConv()
3135         Subtarget.hasStdExtF()) {  in LowerOperation()
7122                Subtarget.hasStdExtF()) {  in ReplaceNodeResults()
11805       if (Subtarget.hasStdExtF() && VT == MVT::f32)  in getRegForInlineAsmConstraint()
11872   if (Subtarget.hasStdExtF()) {  in getRegForInlineAsmConstraint()
12221     return Subtarget.hasStdExtF();  in shouldConvertFpToSat()
12270     return Subtarget.hasStdExtF();  in isFMAFasterThanFMulAndFAdd()