48 RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,  in RISCVTargetLowering()  function in RISCVTargetLowering
973 EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL,  in getSetCCResultType()
984 MVT RISCVTargetLowering::getVPExplicitVectorLengthTy() const {  in getVPExplicitVectorLengthTy()
988 bool RISCVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,  in getTgtMemIntrinsic()
1053 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL,  in isLegalAddressingMode()
1083 bool RISCVTargetLowering::isLegalICmpImmediate(int64_t Imm) const {  in isLegalICmpImmediate()
1087 bool RISCVTargetLowering::isLegalAddImmediate(int64_t Imm) const {  in isLegalAddImmediate()
1094 bool RISCVTargetLowering::isTruncateFree(Type *SrcTy, Type *DstTy) const {  in isTruncateFree()
1102 bool RISCVTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const {  in isTruncateFree()
1111 bool RISCVTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {  in isZExtFree()
1126 bool RISCVTargetLowering::isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const {  in isSExtCheaperThanZExt()
1130 bool RISCVTargetLowering::signExtendConstant(const ConstantInt *CI) const {  in signExtendConstant()
1134 bool RISCVTargetLowering::isCheapToSpeculateCttz() const {  in isCheapToSpeculateCttz()
1138 bool RISCVTargetLowering::isCheapToSpeculateCtlz() const {  in isCheapToSpeculateCtlz()
1142 bool RISCVTargetLowering::hasAndNotCompare(SDValue Y) const {  in hasAndNotCompare()
1154 bool RISCVTargetLowering::hasBitTest(SDValue X, SDValue Y) const {  in hasBitTest()
1160 bool RISCVTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,  in shouldConvertConstantLoadToIntImm()
1191 bool RISCVTargetLowering::
1218 bool RISCVTargetLowering::shouldSinkOperands(  in shouldSinkOperands()
1316 bool RISCVTargetLowering::shouldScalarizeBinop(SDValue VecOp) const {  in shouldScalarizeBinop()
1335 bool RISCVTargetLowering::isOffsetFoldingLegal(  in isOffsetFoldingLegal()
1344 bool RISCVTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,  in isFPImmLegal()
1356 bool RISCVTargetLowering::hasBitPreservingFPLogic(EVT VT) const {  in hasBitPreservingFPLogic()
1362 MVT RISCVTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,  in getRegisterTypeForCallingConv()
1374 unsigned RISCVTargetLowering::getNumRegistersForCallingConv(LLVMContext &Context,  in getNumRegistersForCallingConv()
1446 RISCVII::VLMUL RISCVTargetLowering::getLMUL(MVT VT) {  in getLMUL()
1472 unsigned RISCVTargetLowering::getRegClassIDForLMUL(RISCVII::VLMUL LMul) {  in getRegClassIDForLMUL()
1490 unsigned RISCVTargetLowering::getSubregIndexByMVT(MVT VT, unsigned Index) {  in getSubregIndexByMVT()
1513 unsigned RISCVTargetLowering::getRegClassIDForVecVT(MVT VT) {  in getRegClassIDForVecVT()
1525 RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs(  in decomposeSubvectorInsertExtractToSubRegs()
1557 bool RISCVTargetLowering::mergeStoresAfterLegalization(EVT VT) const {  in mergeStoresAfterLegalization()
1562 bool RISCVTargetLowering::isLegalElementTypeForRVV(Type *ScalarTy) const {  in isLegalElementTypeForRVV()
1663 bool RISCVTargetLowering::useRVVForFixedLengthVectorVT(MVT VT) const {  in useRVVForFixedLengthVectorVT()
1708 MVT RISCVTargetLowering::getContainerForFixedLengthVector(MVT VT) const {  in getContainerForFixedLengthVector()
1784 bool RISCVTargetLowering::shouldExpandBuildVectorWithShuffles(  in shouldExpandBuildVectorWithShuffles()
2936 bool RISCVTargetLowering::isShuffleMaskLegal(ArrayRef<int> M, EVT VT) const {  in isShuffleMaskLegal()
3008 SDValue RISCVTargetLowering::expandUnalignedRVVLoad(SDValue Op,  in expandUnalignedRVVLoad()
3037 SDValue RISCVTargetLowering::expandUnalignedRVVStore(SDValue Op,  in expandUnalignedRVVStore()
3090 SDValue RISCVTargetLowering::LowerOperation(SDValue Op,  in LowerOperation()
3698 SDValue RISCVTargetLowering::getAddr(NodeTy *N, SelectionDAG &DAG,  in getAddr()
3747 SDValue RISCVTargetLowering::lowerGlobalAddress(SDValue Op,  in lowerGlobalAddress()
3755 SDValue RISCVTargetLowering::lowerBlockAddress(SDValue Op,  in lowerBlockAddress()
3762 SDValue RISCVTargetLowering::lowerConstantPool(SDValue Op,  in lowerConstantPool()
3769 SDValue RISCVTargetLowering::lowerJumpTable(SDValue Op,  in lowerJumpTable()
3776 SDValue RISCVTargetLowering::getStaticTLSAddr(GlobalAddressSDNode *N,  in getStaticTLSAddr()
3823 SDValue RISCVTargetLowering::getDynamicTLSAddr(GlobalAddressSDNode *N,  in getDynamicTLSAddr()
3854 SDValue RISCVTargetLowering::lowerGlobalTLSAddress(SDValue Op,  in lowerGlobalTLSAddress()
3883 SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {  in lowerSELECT()
3948 SDValue RISCVTargetLowering::lowerBRCOND(SDValue Op, SelectionDAG &DAG) const {  in lowerBRCOND()
3971 SDValue RISCVTargetLowering::lowerVASTART(SDValue Op, SelectionDAG &DAG) const {  in lowerVASTART()
3986 SDValue RISCVTargetLowering::lowerFRAMEADDR(SDValue Op,  in lowerFRAMEADDR()
4009 SDValue RISCVTargetLowering::lowerRETURNADDR(SDValue Op,  in lowerRETURNADDR()
4039 SDValue RISCVTargetLowering::lowerShiftLeftParts(SDValue Op,  in lowerShiftLeftParts()
4078 SDValue RISCVTargetLowering::lowerShiftRightParts(SDValue Op, SelectionDAG &DAG,  in lowerShiftRightParts()
4132 SDValue RISCVTargetLowering::lowerVectorMaskSplat(SDValue Op,  in lowerVectorMaskSplat()
4161 SDValue RISCVTargetLowering::lowerSPLAT_VECTOR_PARTS(SDValue Op,  in lowerSPLAT_VECTOR_PARTS()
4211 SDValue RISCVTargetLowering::lowerVectorMaskExt(SDValue Op, SelectionDAG &DAG,  in lowerVectorMaskExt()
4249 SDValue RISCVTargetLowering::lowerFixedLengthVectorExtendToRVV(  in lowerFixedLengthVectorExtendToRVV()
4280 SDValue RISCVTargetLowering::lowerVectorMaskTruncLike(SDValue Op,  in lowerVectorMaskTruncLike()
4331 SDValue RISCVTargetLowering::lowerVectorTruncLike(SDValue Op,  in lowerVectorTruncLike()
4394 RISCVTargetLowering::lowerVectorFPExtendOrRoundLike(SDValue Op,  in lowerVectorFPExtendOrRoundLike()
4468 SDValue RISCVTargetLowering::lowerINSERT_VECTOR_ELT(SDValue Op,  in lowerINSERT_VECTOR_ELT()
4567 SDValue RISCVTargetLowering::lowerEXTRACT_VECTOR_ELT(SDValue Op,  in lowerEXTRACT_VECTOR_ELT()
4742           RISCVTargetLowering::computeVLMAX(VectorBitsMax, EltSize, MinSize);  in lowerVectorIntrinsicScalars()
4746           RISCVTargetLowering::computeVLMAX(VectorBitsMin, EltSize, MinSize);  in lowerVectorIntrinsicScalars()
4753         RISCVII::VLMUL Lmul = RISCVTargetLowering::getLMUL(I32VT);  in lowerVectorIntrinsicScalars()
4768       RISCVII::VLMUL Lmul = RISCVTargetLowering::getLMUL(VT);  in lowerVectorIntrinsicScalars()
4837 SDValue RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,  in LowerINTRINSIC_WO_CHAIN()
4958 SDValue RISCVTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,  in LowerINTRINSIC_W_CHAIN()
5057 SDValue RISCVTargetLowering::LowerINTRINSIC_VOID(SDValue Op,  in LowerINTRINSIC_VOID()
5137 SDValue RISCVTargetLowering::lowerVectorMaskVecReduction(SDValue Op,  in lowerVectorMaskVecReduction()
5220 SDValue RISCVTargetLowering::lowerVECREDUCE(SDValue Op,  in lowerVECREDUCE()
5301 SDValue RISCVTargetLowering::lowerFPVECREDUCE(SDValue Op,  in lowerFPVECREDUCE()
5364 SDValue RISCVTargetLowering::lowerVPREDUCE(SDValue Op,  in lowerVPREDUCE()
5404 SDValue RISCVTargetLowering::lowerINSERT_SUBVECTOR(SDValue Op,  in lowerINSERT_SUBVECTOR()
5489       RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs(  in lowerINSERT_SUBVECTOR()
5492   RISCVII::VLMUL SubVecLMUL = RISCVTargetLowering::getLMUL(SubVecVT);  in lowerINSERT_SUBVECTOR()
5558 SDValue RISCVTargetLowering::lowerEXTRACT_SUBVECTOR(SDValue Op,  in lowerEXTRACT_SUBVECTOR()
5638       RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs(  in lowerEXTRACT_SUBVECTOR()
5684 SDValue RISCVTargetLowering::lowerSTEP_VECTOR(SDValue Op,  in lowerSTEP_VECTOR()
5714 SDValue RISCVTargetLowering::lowerVECTOR_REVERSE(SDValue Op,  in lowerVECTOR_REVERSE()
5728     RISCVTargetLowering::computeVLMAX(VectorBitsMax, EltSize, MinSize);  in lowerVECTOR_REVERSE()
5793 SDValue RISCVTargetLowering::lowerVECTOR_SPLICE(SDValue Op,  in lowerVECTOR_SPLICE()
5829 RISCVTargetLowering::lowerFixedLengthVectorLoadToRVV(SDValue Op,  in lowerFixedLengthVectorLoadToRVV()
5863 RISCVTargetLowering::lowerFixedLengthVectorStoreToRVV(SDValue Op,  in lowerFixedLengthVectorStoreToRVV()
5901 SDValue RISCVTargetLowering::lowerMaskedLoad(SDValue Op,  in lowerMaskedLoad()
5966 SDValue RISCVTargetLowering::lowerMaskedStore(SDValue Op,  in lowerMaskedStore()
6020 RISCVTargetLowering::lowerFixedLengthVectorSetccToRVV(SDValue Op,  in lowerFixedLengthVectorSetccToRVV()
6045 SDValue RISCVTargetLowering::lowerFixedLengthVectorLogicOpToRVV(  in lowerFixedLengthVectorLogicOpToRVV()
6056 RISCVTargetLowering::lowerFixedLengthVectorShiftToRVV(SDValue Op,  in lowerFixedLengthVectorShiftToRVV()
6070 SDValue RISCVTargetLowering::lowerABS(SDValue Op, SelectionDAG &DAG) const {  in lowerABS()
6094 SDValue RISCVTargetLowering::lowerFixedLengthVectorFCOPYSIGNToRVV(  in lowerFixedLengthVectorFCOPYSIGNToRVV()
6116 SDValue RISCVTargetLowering::lowerFixedLengthVectorSelectToRVV(  in lowerFixedLengthVectorSelectToRVV()
6141 SDValue RISCVTargetLowering::lowerToScalableOp(SDValue Op, SelectionDAG &DAG,  in lowerToScalableOp()
6180 SDValue RISCVTargetLowering::lowerVPOp(SDValue Op, SelectionDAG &DAG,  in lowerVPOp()
6212 SDValue RISCVTargetLowering::lowerVPExtMaskOp(SDValue Op,  in lowerVPExtMaskOp()
6245 SDValue RISCVTargetLowering::lowerVPSetCCMaskOp(SDValue Op,  in lowerVPSetCCMaskOp()
6325 SDValue RISCVTargetLowering::lowerVPFPIntConvOp(SDValue Op, SelectionDAG &DAG,  in lowerVPFPIntConvOp()
6457 SDValue RISCVTargetLowering::lowerLogicVPOp(SDValue Op, SelectionDAG &DAG,  in lowerLogicVPOp()
6490 SDValue RISCVTargetLowering::lowerMaskedGather(SDValue Op,  in lowerMaskedGather()
6593 SDValue RISCVTargetLowering::lowerMaskedScatter(SDValue Op,  in lowerMaskedScatter()
6677 SDValue RISCVTargetLowering::lowerGET_ROUNDING(SDValue Op,  in lowerGET_ROUNDING()
6708 SDValue RISCVTargetLowering::lowerSET_ROUNDING(SDValue Op,  in lowerSET_ROUNDING()
6738 SDValue RISCVTargetLowering::lowerEH_DWARF_CFA(SDValue Op,  in lowerEH_DWARF_CFA()
6834 void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,  in ReplaceNodeResults()
8819 SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,  in PerformDAGCombine()
9382 bool RISCVTargetLowering::isDesirableToCommuteWithShift(  in isDesirableToCommuteWithShift()
9434 bool RISCVTargetLowering::targetShrinkDemandedConstant(  in targetShrinkDemandedConstant()
9541 void RISCVTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,  in computeKnownBitsForTargetNode()
9651 unsigned RISCVTargetLowering::ComputeNumSignBitsForTargetNode(  in ComputeNumSignBitsForTargetNode()
9723 RISCVTargetLowering::getTargetConstantFromLoad(LoadSDNode *Ld) const {  in getTargetConstantFromLoad()
10182 RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,  in EmitInstrWithCustomInserter()
10215 void RISCVTargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,  in AdjustInstrPostInstrSelection()
10325                                CCState &State, const RISCVTargetLowering &TLI) {  in allocateRVVReg()
10348                      bool IsRet, Type *OrigTy, const RISCVTargetLowering &TLI,  in CC_RISCV()
10571 void RISCVTargetLowering::analyzeInputArgs(  in analyzeInputArgs()
10603 void RISCVTargetLowering::analyzeOutputArgs(  in analyzeOutputArgs()
10657                                 const RISCVTargetLowering &TLI) {  in unpackFromRegLoc()
10778                             const RISCVTargetLowering &TLI,  in CC_RISCV_FastCC()
10920 SDValue RISCVTargetLowering::LowerFormalArguments(  in LowerFormalArguments()
11078 bool RISCVTargetLowering::isEligibleForTailCallOptimization(  in isEligibleForTailCallOptimization()
11155 SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,  in LowerCall()
11455 bool RISCVTargetLowering::CanLowerReturn(  in CanLowerReturn()
11478 RISCVTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,  in LowerReturn()
11577 void RISCVTargetLowering::validateCCReservedRegs(  in validateCCReservedRegs()
11590 bool RISCVTargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const {  in mayBeEmittedAsTailCall()
11594 const char *RISCVTargetLowering::getTargetNodeName(unsigned Opcode) const {  in getTargetNodeName()
11765 RISCVTargetLowering::ConstraintType
11766 RISCVTargetLowering::getConstraintType(StringRef Constraint) const {  in getConstraintType()
11790 RISCVTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,  in getRegForInlineAsmConstraint()
11989 RISCVTargetLowering::getInlineAsmMemConstraint(StringRef ConstraintCode) const {  in getInlineAsmMemConstraint()
12003 void RISCVTargetLowering::LowerAsmOperandForConstraint(  in LowerAsmOperandForConstraint()
12050 Instruction *RISCVTargetLowering::emitLeadingFence(IRBuilderBase &Builder,  in emitLeadingFence()
12060 Instruction *RISCVTargetLowering::emitTrailingFence(IRBuilderBase &Builder,  in emitTrailingFence()
12069 RISCVTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {  in shouldExpandAtomicRMWInIR()
12133 Value *RISCVTargetLowering::emitMaskedAtomicRMWIntrinsic(  in emitMaskedAtomicRMWIntrinsic()
12177 RISCVTargetLowering::shouldExpandAtomicCmpXchgInIR(  in shouldExpandAtomicCmpXchgInIR()
12185 Value *RISCVTargetLowering::emitMaskedAtomicCmpXchgIntrinsic(  in emitMaskedAtomicCmpXchgIntrinsic()
12207 bool RISCVTargetLowering::shouldRemoveExtendFromGSIndex(EVT IndexVT,  in shouldRemoveExtendFromGSIndex()
12212 bool RISCVTargetLowering::shouldConvertFpToSat(unsigned Op, EVT FPVT,  in shouldConvertFpToSat()
12229 unsigned RISCVTargetLowering::getJumpTableEncoding() const {  in getJumpTableEncoding()
12239 const MCExpr *RISCVTargetLowering::LowerCustomJumpTableEntry(  in LowerCustomJumpTableEntry()
12247 bool RISCVTargetLowering::isVScaleKnownToBeAPowerOfTwo() const {  in isVScaleKnownToBeAPowerOfTwo()
12259 bool RISCVTargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,  in isFMAFasterThanFMulAndFAdd()
12280 Register RISCVTargetLowering::getExceptionPointerRegister(  in getExceptionPointerRegister()
12285 Register RISCVTargetLowering::getExceptionSelectorRegister(  in getExceptionSelectorRegister()
12290 bool RISCVTargetLowering::shouldExtendTypeInLibCall(EVT Type) const {  in shouldExtendTypeInLibCall()
12300 bool RISCVTargetLowering::shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const {  in shouldSignExtendTypeInLibCall()
12307 bool RISCVTargetLowering::decomposeMulByConstant(LLVMContext &Context, EVT VT,  in decomposeMulByConstant()
12346 bool RISCVTargetLowering::isMulAddWithConstProfitable(SDValue AddNode,  in isMulAddWithConstProfitable()
12369 bool RISCVTargetLowering::allowsMisalignedMemoryAccesses(  in allowsMisalignedMemoryAccesses()
12389 bool RISCVTargetLowering::splitValueIntoRegisterParts(  in splitValueIntoRegisterParts()
12443 SDValue RISCVTargetLowering::joinRegisterPartsIntoValue(  in joinRegisterPartsIntoValue()
12489 RISCVTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,  in BuildSDIVPow2()
12546 RISCVTargetLowering::getRegisterByName(const char *RegName, LLT VT,  in getRegisterByName()