44   bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
47                            MachineBasicBlock::iterator MBBI,
51                               MachineBasicBlock::iterator MBBI,
54                          MachineBasicBlock::iterator MBBI,
57                               MachineBasicBlock::iterator MBBI,
60                               MachineBasicBlock::iterator MBBI,
62   bool expandVSetVL(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
64                          MachineBasicBlock::iterator MBBI, unsigned Opcode);
65   bool expandVSPILL(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
66   bool expandVRELOAD(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
82   MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();  in expandMBB()  local
83   while (MBBI != E) {  in expandMBB()
84     MachineBasicBlock::iterator NMBBI = std::next(MBBI);  in expandMBB()
85     Modified |= expandMI(MBB, MBBI, NMBBI);  in expandMBB()
86     MBBI = NMBBI;  in expandMBB()
93                                  MachineBasicBlock::iterator MBBI,  in expandMI()  argument
98   switch (MBBI->getOpcode()) {  in expandMI()
100     return expandLoadLocalAddress(MBB, MBBI, NextMBBI);  in expandMI()
102     return expandLoadAddress(MBB, MBBI, NextMBBI);  in expandMI()
104     return expandLoadTLSIEAddress(MBB, MBBI, NextMBBI);  in expandMI()
106     return expandLoadTLSGDAddress(MBB, MBBI, NextMBBI);  in expandMI()
110     return expandVSetVL(MBB, MBBI);  in expandMI()
119     return expandVMSET_VMCLR(MBB, MBBI, RISCV::VMXOR_MM);  in expandMI()
128     return expandVMSET_VMCLR(MBB, MBBI, RISCV::VMXNOR_MM);  in expandMI()
140     return expandVSPILL(MBB, MBBI);  in expandMI()
152     return expandVRELOAD(MBB, MBBI);  in expandMI()
159     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,  in expandAuipcInstPair()  argument
163   MachineInstr &MI = *MBBI;  in expandAuipcInstPair()
184   NewMBB->splice(NewMBB->end(), &MBB, std::next(MBBI), MBB.end());  in expandAuipcInstPair()
200     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,  in expandLoadLocalAddress()  argument
202   return expandAuipcInstPair(MBB, MBBI, NextMBBI, RISCVII::MO_PCREL_HI,  in expandLoadLocalAddress()
207     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,  in expandLoadAddress()  argument
221   return expandAuipcInstPair(MBB, MBBI, NextMBBI, FlagsHi, SecondOpcode);  in expandLoadAddress()
225     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,  in expandLoadTLSIEAddress()  argument
231   return expandAuipcInstPair(MBB, MBBI, NextMBBI, RISCVII::MO_TLS_GOT_HI,  in expandLoadTLSIEAddress()
236     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,  in expandLoadTLSGDAddress()  argument
238   return expandAuipcInstPair(MBB, MBBI, NextMBBI, RISCVII::MO_TLS_GD_HI,  in expandLoadTLSGDAddress()
243                                      MachineBasicBlock::iterator MBBI) {  in expandVSetVL()  argument
244   assert(MBBI->getNumExplicitOperands() == 3 && MBBI->getNumOperands() >= 5 &&  in expandVSetVL()
247   DebugLoc DL = MBBI->getDebugLoc();  in expandVSetVL()
249   assert((MBBI->getOpcode() == RISCV::PseudoVSETVLI ||  in expandVSetVL()
250           MBBI->getOpcode() == RISCV::PseudoVSETVLIX0 ||  in expandVSetVL()
251           MBBI->getOpcode() == RISCV::PseudoVSETIVLI) &&  in expandVSetVL()
254   if (MBBI->getOpcode() == RISCV::PseudoVSETIVLI)  in expandVSetVL()
261   Register DstReg = MBBI->getOperand(0).getReg();  in expandVSetVL()
262   bool DstIsDead = MBBI->getOperand(0).isDead();  in expandVSetVL()
263   BuildMI(MBB, MBBI, DL, Desc)  in expandVSetVL()
265       .add(MBBI->getOperand(1))  // VL  in expandVSetVL()
266       .add(MBBI->getOperand(2)); // VType  in expandVSetVL()
268   MBBI->eraseFromParent(); // The pseudo instruction is gone now.  in expandVSetVL()
273                                           MachineBasicBlock::iterator MBBI,  in expandVMSET_VMCLR()  argument
275   DebugLoc DL = MBBI->getDebugLoc();  in expandVMSET_VMCLR()
276   Register DstReg = MBBI->getOperand(0).getReg();  in expandVMSET_VMCLR()
278   BuildMI(MBB, MBBI, DL, Desc, DstReg)  in expandVMSET_VMCLR()
281   MBBI->eraseFromParent(); // The pseudo instruction is gone now.  in expandVMSET_VMCLR()
286                                      MachineBasicBlock::iterator MBBI) {  in expandVSPILL()  argument
289   DebugLoc DL = MBBI->getDebugLoc();  in expandVSPILL()
290   Register SrcReg = MBBI->getOperand(0).getReg();  in expandVSPILL()
291   Register Base = MBBI->getOperand(1).getReg();  in expandVSPILL()
292   Register VL = MBBI->getOperand(2).getReg();  in expandVSPILL()
293   auto ZvlssegInfo = RISCV::isRVVSpillForZvlsseg(MBBI->getOpcode());  in expandVSPILL()
321     BuildMI(MBB, MBBI, DL, TII->get(Opcode))  in expandVSPILL()
324         .addMemOperand(*(MBBI->memoperands_begin()))  in expandVSPILL()
327       BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADD), Base)  in expandVSPILL()
331   MBBI->eraseFromParent();  in expandVSPILL()
336                                       MachineBasicBlock::iterator MBBI) {  in expandVRELOAD()  argument
339   DebugLoc DL = MBBI->getDebugLoc();  in expandVRELOAD()
340   Register DestReg = MBBI->getOperand(0).getReg();  in expandVRELOAD()
341   Register Base = MBBI->getOperand(1).getReg();  in expandVRELOAD()
342   Register VL = MBBI->getOperand(2).getReg();  in expandVRELOAD()
343   auto ZvlssegInfo = RISCV::isRVVSpillForZvlsseg(MBBI->getOpcode());  in expandVRELOAD()
367     BuildMI(MBB, MBBI, DL, TII->get(Opcode),  in expandVRELOAD()
370         .addMemOperand(*(MBBI->memoperands_begin()));  in expandVRELOAD()
372       BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADD), Base)  in expandVRELOAD()
376   MBBI->eraseFromParent();  in expandVRELOAD()