Lines Matching refs:Width

52                          bool IsMasked, int Width,
56 AtomicRMWInst::BinOp, bool IsMasked, int Width,
60 int Width, MachineBasicBlock::iterator &NextMBBI);
200 static unsigned getLRForRMW(AtomicOrdering Ordering, int Width) { in getLRForRMW() argument
201 if (Width == 32) in getLRForRMW()
203 if (Width == 64) in getLRForRMW()
208 static unsigned getSCForRMW(AtomicOrdering Ordering, int Width) { in getSCForRMW() argument
209 if (Width == 32) in getSCForRMW()
211 if (Width == 64) in getSCForRMW()
220 AtomicRMWInst::BinOp BinOp, int Width) { in doAtomicBinOpExpansion() argument
233 BuildMI(LoopMBB, DL, TII->get(getLRForRMW(Ordering, Width)), DestReg) in doAtomicBinOpExpansion()
247 BuildMI(LoopMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) in doAtomicBinOpExpansion()
281 MachineBasicBlock *DoneMBB, AtomicRMWInst::BinOp BinOp, int Width) { in doMaskedAtomicBinOpExpansion() argument
282 assert(Width == 32 && "Should never need to expand masked 64-bit operations"); in doMaskedAtomicBinOpExpansion()
343 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in expandAtomicBinOp() argument
364 doAtomicBinOpExpansion(TII, MI, DL, &MBB, LoopMBB, DoneMBB, BinOp, Width); in expandAtomicBinOp()
367 Width); in expandAtomicBinOp()
392 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in expandAtomicMinMaxOp() argument
396 assert(Width == 32 && "Should never need to expand masked 64-bit operations"); in expandAtomicMinMaxOp()
513 int Width, MachineBasicBlock::iterator &NextMBBI) { in expandAtomicCmpXchg() argument
547 BuildMI(LoopHeadMBB, DL, TII->get(getLRForRMW(Ordering, Width)), DestReg) in expandAtomicCmpXchg()
556 BuildMI(LoopTailMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) in expandAtomicCmpXchg()
569 BuildMI(LoopHeadMBB, DL, TII->get(getLRForRMW(Ordering, Width)), DestReg) in expandAtomicCmpXchg()
587 BuildMI(LoopTailMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) in expandAtomicCmpXchg()