Lines Matching refs:RISCVMCCodeEmitter
40 class RISCVMCCodeEmitter : public MCCodeEmitter { class
41 RISCVMCCodeEmitter(const RISCVMCCodeEmitter &) = delete;
42 void operator=(const RISCVMCCodeEmitter &) = delete;
47 RISCVMCCodeEmitter(MCContext &ctx, MCInstrInfo const &MCII) in RISCVMCCodeEmitter() function in __anoncfd3293d0111::RISCVMCCodeEmitter
50 ~RISCVMCCodeEmitter() override = default;
92 return new RISCVMCCodeEmitter(Ctx, MCII); in createRISCVMCCodeEmitter()
103 void RISCVMCCodeEmitter::expandFunctionCall(const MCInst &MI, raw_ostream &OS, in expandFunctionCall()
145 void RISCVMCCodeEmitter::expandAddTPRel(const MCInst &MI, raw_ostream &OS, in expandAddTPRel()
182 void RISCVMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, in encodeInstruction()
226 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue()
241 RISCVMCCodeEmitter::getImmOpValueAsr1(const MCInst &MI, unsigned OpNo, in getImmOpValueAsr1()
255 unsigned RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo, in getImmOpValue()
381 unsigned RISCVMCCodeEmitter::getVMaskReg(const MCInst &MI, unsigned OpNo, in getVMaskReg()