Lines Matching refs:RISCV

97   static_assert((array_lengthof(Infos)) == RISCV::NumTargetFixupKinds,  in getFixupKindInfo()
131 case RISCV::fixup_riscv_got_hi20: in shouldForceRelocation()
132 case RISCV::fixup_riscv_tls_got_hi20: in shouldForceRelocation()
133 case RISCV::fixup_riscv_tls_gd_hi20: in shouldForceRelocation()
137 return STI.getFeatureBits()[RISCV::FeatureRelax] || ForceRelocs; in shouldForceRelocation()
157 case RISCV::fixup_riscv_rvc_branch: in fixupNeedsRelaxationAdvanced()
161 case RISCV::fixup_riscv_rvc_jump: in fixupNeedsRelaxationAdvanced()
175 case RISCV::C_BEQZ: in relaxInstruction()
177 Res.setOpcode(RISCV::BEQ); in relaxInstruction()
179 Res.addOperand(MCOperand::createReg(RISCV::X0)); in relaxInstruction()
182 case RISCV::C_BNEZ: in relaxInstruction()
184 Res.setOpcode(RISCV::BNE); in relaxInstruction()
186 Res.addOperand(MCOperand::createReg(RISCV::X0)); in relaxInstruction()
189 case RISCV::C_J: in relaxInstruction()
191 Res.setOpcode(RISCV::JAL); in relaxInstruction()
192 Res.addOperand(MCOperand::createReg(RISCV::X0)); in relaxInstruction()
195 case RISCV::C_JAL: in relaxInstruction()
197 Res.setOpcode(RISCV::JAL); in relaxInstruction()
198 Res.addOperand(MCOperand::createReg(RISCV::X1)); in relaxInstruction()
245 Fixup = PtrSize == 4 ? std::make_pair(RISCV::fixup_riscv_add_32, in relaxDwarfLineAddr()
246 RISCV::fixup_riscv_sub_32) in relaxDwarfLineAddr()
247 : std::make_pair(RISCV::fixup_riscv_add_64, in relaxDwarfLineAddr()
248 RISCV::fixup_riscv_sub_64); in relaxDwarfLineAddr()
253 Fixup = {RISCV::fixup_riscv_add_16, RISCV::fixup_riscv_sub_16}; in relaxDwarfLineAddr()
313 AddFixups(0, {RISCV::fixup_riscv_set_6b, RISCV::fixup_riscv_sub_6b}); in relaxDwarfCFA()
317 AddFixups(1, {RISCV::fixup_riscv_set_8, RISCV::fixup_riscv_sub_8}); in relaxDwarfCFA()
321 AddFixups(1, {RISCV::fixup_riscv_set_16, RISCV::fixup_riscv_sub_16}); in relaxDwarfCFA()
325 AddFixups(1, {RISCV::fixup_riscv_set_32, RISCV::fixup_riscv_sub_32}); in relaxDwarfCFA()
340 case RISCV::C_BEQZ: in getRelaxedOpcode()
341 return RISCV::BEQ; in getRelaxedOpcode()
342 case RISCV::C_BNEZ: in getRelaxedOpcode()
343 return RISCV::BNE; in getRelaxedOpcode()
344 case RISCV::C_J: in getRelaxedOpcode()
345 case RISCV::C_JAL: // fall through. in getRelaxedOpcode()
346 return RISCV::JAL; in getRelaxedOpcode()
357 bool HasStdExtC = STI->getFeatureBits()[RISCV::FeatureStdExtC]; in writeNopData()
379 case RISCV::fixup_riscv_got_hi20: in adjustFixupValue()
380 case RISCV::fixup_riscv_tls_got_hi20: in adjustFixupValue()
381 case RISCV::fixup_riscv_tls_gd_hi20: in adjustFixupValue()
383 case RISCV::fixup_riscv_set_8: in adjustFixupValue()
384 case RISCV::fixup_riscv_add_8: in adjustFixupValue()
385 case RISCV::fixup_riscv_sub_8: in adjustFixupValue()
386 case RISCV::fixup_riscv_set_16: in adjustFixupValue()
387 case RISCV::fixup_riscv_add_16: in adjustFixupValue()
388 case RISCV::fixup_riscv_sub_16: in adjustFixupValue()
389 case RISCV::fixup_riscv_set_32: in adjustFixupValue()
390 case RISCV::fixup_riscv_add_32: in adjustFixupValue()
391 case RISCV::fixup_riscv_sub_32: in adjustFixupValue()
392 case RISCV::fixup_riscv_add_64: in adjustFixupValue()
393 case RISCV::fixup_riscv_sub_64: in adjustFixupValue()
400 case RISCV::fixup_riscv_set_6b: in adjustFixupValue()
402 case RISCV::fixup_riscv_lo12_i: in adjustFixupValue()
403 case RISCV::fixup_riscv_pcrel_lo12_i: in adjustFixupValue()
404 case RISCV::fixup_riscv_tprel_lo12_i: in adjustFixupValue()
406 case RISCV::fixup_riscv_lo12_s: in adjustFixupValue()
407 case RISCV::fixup_riscv_pcrel_lo12_s: in adjustFixupValue()
408 case RISCV::fixup_riscv_tprel_lo12_s: in adjustFixupValue()
410 case RISCV::fixup_riscv_hi20: in adjustFixupValue()
411 case RISCV::fixup_riscv_pcrel_hi20: in adjustFixupValue()
412 case RISCV::fixup_riscv_tprel_hi20: in adjustFixupValue()
415 case RISCV::fixup_riscv_jal: { in adjustFixupValue()
432 case RISCV::fixup_riscv_branch: { in adjustFixupValue()
450 case RISCV::fixup_riscv_call: in adjustFixupValue()
451 case RISCV::fixup_riscv_call_plt: { in adjustFixupValue()
459 case RISCV::fixup_riscv_rvc_jump: { in adjustFixupValue()
473 case RISCV::fixup_riscv_rvc_branch: { in adjustFixupValue()
498 case RISCV::fixup_riscv_pcrel_hi20: in evaluateTargetFixup()
503 case RISCV::fixup_riscv_pcrel_lo12_i: in evaluateTargetFixup()
504 case RISCV::fixup_riscv_pcrel_lo12_s: { in evaluateTargetFixup()
587 if (!STI->getFeatureBits()[RISCV::FeatureRelax]) in shouldInsertExtraNopBytesForCodeAlign()
590 bool HasStdExtC = STI->getFeatureBits()[RISCV::FeatureStdExtC]; in shouldInsertExtraNopBytesForCodeAlign()
611 if (!STI->getFeatureBits()[RISCV::FeatureRelax]) in shouldInsertFixupForCodeAlign()
624 MCFixup::create(0, Dummy, MCFixupKind(RISCV::fixup_riscv_align), SMLoc()); in shouldInsertFixupForCodeAlign()