Lines Matching refs:PPC

60         if (MI.getOpcode() != PPC::ADDItlsgdLADDR &&  in processBlock()
61 MI.getOpcode() != PPC::ADDItlsldLADDR && in processBlock()
62 MI.getOpcode() != PPC::ADDItlsgdLADDR32 && in processBlock()
63 MI.getOpcode() != PPC::ADDItlsldLADDR32 && in processBlock()
64 MI.getOpcode() != PPC::TLSGDAIX && in processBlock()
65 MI.getOpcode() != PPC::TLSGDAIX8 && !IsPCREL) { in processBlock()
70 if (MI.getOpcode() == PPC::ADJCALLSTACKDOWN) in processBlock()
72 else if (MI.getOpcode() == PPC::ADJCALLSTACKUP) in processBlock()
82 Register InReg = PPC::NoRegister; in processBlock()
83 Register GPR3 = Is64Bit ? PPC::X3 : PPC::R3; in processBlock()
84 Register GPR4 = Is64Bit ? PPC::X4 : PPC::R4; in processBlock()
93 case PPC::ADDItlsgdLADDR: in processBlock()
94 Opc1 = PPC::ADDItlsgdL; in processBlock()
95 Opc2 = PPC::GETtlsADDR; in processBlock()
97 case PPC::ADDItlsldLADDR: in processBlock()
98 Opc1 = PPC::ADDItlsldL; in processBlock()
99 Opc2 = PPC::GETtlsldADDR; in processBlock()
101 case PPC::ADDItlsgdLADDR32: in processBlock()
102 Opc1 = PPC::ADDItlsgdL32; in processBlock()
103 Opc2 = PPC::GETtlsADDR32; in processBlock()
105 case PPC::ADDItlsldLADDR32: in processBlock()
106 Opc1 = PPC::ADDItlsldL32; in processBlock()
107 Opc2 = PPC::GETtlsldADDR32; in processBlock()
109 case PPC::TLSGDAIX8: in processBlock()
112 Opc2 = PPC::GETtlsADDR64AIX; in processBlock()
114 case PPC::TLSGDAIX: in processBlock()
117 Opc2 = PPC::GETtlsADDR32AIX; in processBlock()
119 case PPC::PADDI8pc: in processBlock()
121 Opc1 = PPC::PADDI8pc; in processBlock()
124 ? PPC::GETtlsADDRPCREL in processBlock()
125 : PPC::GETtlsldADDRPCREL; in processBlock()
135 BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKDOWN)).addImm(0) in processBlock()
152 assert(InReg != PPC::NoRegister && "Operand must be a register"); in processBlock()
166 BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKUP)).addImm(0).addImm(0); in processBlock()
183 return (MI.getOpcode() == PPC::PADDI8pc) && in isPCREL()