Lines Matching refs:SPR

2514 def MFSPR : XFXForm_1<31, 339, (outs gprc:$RT), (ins i32imm:$SPR),
2515                       "mfspr $RT, $SPR", IIC_SprMFSPR>;
2516 def MTSPR : XFXForm_1<31, 467, (outs), (ins i32imm:$SPR, gprc:$RT),
2517                       "mtspr $SPR, $RT", IIC_SprMTSPR>;
2519 def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR),
2520                      "mftb $RT, $SPR", IIC_SprMFTB>;
2522 def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$SPR),
2523                      "mfpmr $RT, $SPR", IIC_SprMFPMR>;
2525 def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$SPR, gprc:$RT),
2526                      "mtpmr $SPR, $RT", IIC_SprMTPMR>;
2589   // Move to/from VRSAVE: despite being a SPR, the VRSAVE register is renamed
4183 def MFDCR : XFXForm_1<31, 323, (outs gprc:$RT), (ins i32imm:$SPR),
4184                       "mfdcr $RT, $SPR", IIC_SprMFSPR>, Requires<[IsPPC4xx]>;
4185 def MTDCR : XFXForm_1<31, 451, (outs), (ins gprc:$RT, i32imm:$SPR),
4186                       "mtdcr $SPR, $RT", IIC_SprMTSPR>, Requires<[IsPPC4xx]>;
5105 def : Pat<(i32 (int_ppc_mfspr timm:$SPR)),
5106           (MFSPR $SPR)>;
5107 def : Pat<(int_ppc_mtspr timm:$SPR, gprc:$RT),
5108           (MTSPR $SPR, $RT)>;