93                       STI.isPPC64() ? PPC::BLR8 : PPC::BLR),  in PPCInstrInfo()
631   if (!(Subtarget.isPPC64() && Subtarget.hasP9Vector() &&  in shouldReduceRegisterPressure()
691   assert((Subtarget.isPPC64() && Subtarget.hasP9Vector() &&  in generateLoadForNewConst()
1278   bool isPPC64 = Subtarget.isPPC64();  in analyzeBranch()  local
1344       Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,  in analyzeBranch()
1355       Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,  in analyzeBranch()
1412     Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,  in analyzeBranch()
1426     Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,  in analyzeBranch()
1492   bool isPPC64 = Subtarget.isPPC64();  in insertBranch()  local
1500                               (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) :  in insertBranch()
1501                               (isPPC64 ? PPC::BDZ8  : PPC::BDZ))).addMBB(TBB);  in insertBranch()
1517                             (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) :  in insertBranch()
1518                             (isPPC64 ? PPC::BDZ8  : PPC::BDZ))).addMBB(TBB);  in insertBranch()
2118     bool isPPC64 = Subtarget.isPPC64();  in onlyFoldImmediate()  local
2119     ZeroReg = isPPC64 ? PPC::ZERO8 : PPC::ZERO;  in onlyFoldImmediate()
2189       bool isPPC64 = Subtarget.isPPC64();  in PredicateInstruction()  local
2190       MI.setDesc(get(Pred[0].getImm() ? (isPPC64 ? PPC::BDNZLR8 : PPC::BDNZLR)  in PredicateInstruction()
2191                                       : (isPPC64 ? PPC::BDZLR8 : PPC::BDZLR)));  in PredicateInstruction()
2212       bool isPPC64 = Subtarget.isPPC64();  in PredicateInstruction()  local
2213       MI.setDesc(get(Pred[0].getImm() ? (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ)  in PredicateInstruction()
2214                                       : (isPPC64 ? PPC::BDZ8 : PPC::BDZ)));  in PredicateInstruction()
2255     bool isPPC64 = Subtarget.isPPC64();  in PredicateInstruction()  local
2258       MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8 : PPC::BCCTR8)  in PredicateInstruction()
2262       MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8n : PPC::BCCTR8n)  in PredicateInstruction()
2266       MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCCTRL8 : PPC::BCCCTR8)  in PredicateInstruction()
2276           .addReg(isPPC64 ? PPC::LR8 : PPC::LR, RegState::Implicit)  in PredicateInstruction()
2277           .addReg(isPPC64 ? PPC::LR8 : PPC::LR, RegState::ImplicitDefine);  in PredicateInstruction()
2408   bool isPPC64 = Subtarget.isPPC64();  in optimizeCompareInstr()  local
2424   if (isPPC64) {  in optimizeCompareInstr()
3036     const int64_t Offset = Subtarget.isPPC64() ? -0x7010 : -0x7008;  in expandPostRAPseudo()
3037     const unsigned Reg = Subtarget.isPPC64() ? PPC::X13 : PPC::R2;  in expandPostRAPseudo()
3038     MI.setDesc(get(Subtarget.isPPC64() ? PPC::LD : PPC::LWZ));  in expandPostRAPseudo()
3243   bool isPPC64 = Subtarget.isPPC64();  in materializeImmPostRA()  local
3248     BuildMI(MBB, MBBI, DL, get(isPPC64 ? PPC::LI8 : PPC::LI), Reg).addImm(Imm);  in materializeImmPostRA()
3250     BuildMI(MBB, MBBI, DL, get(isPPC64 ? PPC::LIS8 : PPC::LIS), Reg)  in materializeImmPostRA()
3253       BuildMI(MBB, MBBI, DL, get(isPPC64 ? PPC::ORI8 : PPC::ORI), Reg)  in materializeImmPostRA()
3257     assert(isPPC64 && "Materializing 64-bit immediate to single register is "  in materializeImmPostRA()
5236   Register SPReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1;  in isTOCSaveMI()
5409   return (Opcode == (Subtarget.isPPC64() ? PPC::BDNZ8 : PPC::BDNZ));  in isBDNZ()
5446           MF->getSubtarget<PPCSubtarget>().isPPC64() ? PPC::CTR8 : PPC::CTR,  in createTripCountGreaterCondition()
5506   unsigned LOOPi = (Subtarget.isPPC64() ? PPC::MTCTR8loop : PPC::MTCTRloop);  in findLoopInstr()