Lines Matching refs:TrueReg
1535 Register DstReg, Register TrueReg, in canInsertSelect() argument
1554 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
1579 ArrayRef<MachineOperand> Cond, Register TrueReg, in insertSelect() argument
1587 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
1639 Register FirstReg = SwapOps ? FalseReg : TrueReg, in insertSelect()
1640 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect()
3137 unsigned TrueReg, unsigned FalseReg, in selectReg() argument
3144 return Imm1 < Imm2 ? TrueReg : FalseReg; in selectReg()
3146 return Imm1 > Imm2 ? TrueReg : FalseReg; in selectReg()
3148 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
3156 return (uint64_t)Imm1 < (uint64_t)Imm2 ? TrueReg : FalseReg; in selectReg()
3158 return (uint64_t)Imm1 > (uint64_t)Imm2 ? TrueReg : FalseReg; in selectReg()
3160 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
3296 Register TrueReg = TRI->lookThruCopyLike(Reg, MRI); in getForwardingDefMI() local
3297 if (Register::isVirtualRegister(TrueReg)) { in getForwardingDefMI()
3298 DefMI = MRI->getVRegDef(TrueReg); in getForwardingDefMI()
4566 Register TrueReg = CompareUseMI.getOperand(1).getReg(); in simplifyToLI() local
4569 selectReg(SExtImm, SExtComparand, Opc, TrueReg, FalseReg, CRSubReg); in simplifyToLI()
4587 CompareUseMI.removeOperand(RegToCopy == TrueReg ? 2 : 1); in simplifyToLI()