2765     const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,  in getMemOperandsWithOffsetWidth()  argument
2770   if (!getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, Width, TRI))  in getMemOperandsWithOffsetWidth()
2776 static bool isLdStSafeToCluster(const MachineInstr &LdSt,  in isLdStSafeToCluster()  argument
2779   if (LdSt.hasOrderedMemoryRef() || LdSt.getNumExplicitOperands() != 3)  in isLdStSafeToCluster()
2782   if (LdSt.getOperand(2).isFI())  in isLdStSafeToCluster()
2785   assert(LdSt.getOperand(2).isReg() && "Expected a reg operand.");  in isLdStSafeToCluster()
2788   if (LdSt.modifiesRegister(LdSt.getOperand(2).getReg(), TRI))  in isLdStSafeToCluster()
5518     const MachineInstr &LdSt, const MachineOperand *&BaseReg, int64_t &Offset,  in getMemOperandWithOffsetWidth()  argument
5520   if (!LdSt.mayLoadOrStore() || LdSt.getNumExplicitOperands() != 3)  in getMemOperandWithOffsetWidth()
5524   if (!LdSt.getOperand(1).isImm() ||  in getMemOperandWithOffsetWidth()
5525       (!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()))  in getMemOperandWithOffsetWidth()
5527   if (!LdSt.getOperand(1).isImm() ||  in getMemOperandWithOffsetWidth()
5528       (!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()))  in getMemOperandWithOffsetWidth()
5531   if (!LdSt.hasOneMemOperand())  in getMemOperandWithOffsetWidth()
5534   Width = (*LdSt.memoperands_begin())->getSize();  in getMemOperandWithOffsetWidth()
5535   Offset = LdSt.getOperand(1).getImm();  in getMemOperandWithOffsetWidth()
5536   BaseReg = &LdSt.getOperand(2);  in getMemOperandWithOffsetWidth()