Lines Matching refs:SDValue
693 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
809 bool hasAndNotCompare(SDValue) const override { in hasAndNotCompare() argument
819 SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps,
835 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
836 SDValue &Offset,
842 bool SelectAddressEVXRegReg(SDValue N, SDValue &Base, SDValue &Index,
849 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
858 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
861 bool SelectAddressRegImm34(SDValue N, SDValue &Disp, SDValue &Base,
866 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index,
871 bool SelectAddressPCRel(SDValue N, SDValue &Base) const;
877 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
882 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
885 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const;
886 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const;
888 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
890 SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor, SelectionDAG &DAG,
896 void computeKnownBitsForTargetNode(const SDValue Op,
980 void LowerAsmOperandForConstraint(SDValue Op,
982 std::vector<SDValue> &Ops,
1022 bool isZExtFree(SDValue Val, EVT VT2) const override;
1036 SDValue C) const override;
1051 bool isAccessedAsGotIndirect(SDValue N) const;
1137 SDValue getPICJumpTableRelocBase(SDValue Table,
1146 PPC::AddrMode SelectOptimalAddrMode(const SDNode *Parent, SDValue N,
1147 SDValue &Disp, SDValue &Base,
1152 PPC::AddrMode SelectForceXFormMode(SDValue N, SDValue &Disp, SDValue &Base,
1156 splitValueIntoRegisterParts(SelectionDAG &DAG, const SDLoc &DL, SDValue Val,
1157 SDValue *Parts, unsigned NumParts, MVT PartVT,
1182 SDValue Ptr;
1183 SDValue Chain;
1184 SDValue ResChain;
1208 bool canReuseLoadAddress(SDValue Op, EVT MemVT, ReuseLoadInfo &RLI,
1211 void spliceIntoChain(SDValue ResChain, SDValue NewResChain,
1214 void LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
1216 SDValue LowerFP_TO_INTDirectMove(SDValue Op, SelectionDAG &DAG,
1219 bool directMoveIsProfitable(const SDValue &Op) const;
1220 SDValue LowerINT_TO_FPDirectMove(SDValue Op, SelectionDAG &DAG,
1223 SDValue LowerINT_TO_FPVector(SDValue Op, SelectionDAG &DAG,
1226 SDValue LowerTRUNCATEVector(SDValue Op, SelectionDAG &DAG) const;
1228 SDValue getFramePointerFrameIndex(SelectionDAG & DAG) const;
1229 SDValue getReturnAddrFrameIndex(SelectionDAG & DAG) const;
1232 IsEligibleForTailCallOptimization(SDValue Callee,
1239 SDValue Callee, CallingConv::ID CalleeCC, const CallBase *CB,
1243 SDValue EmitTailCallLoadFPAndRetAddr(SelectionDAG &DAG, int SPDiff,
1244 SDValue Chain, SDValue &LROpOut,
1245 SDValue &FPOpOut,
1248 SDValue getTOCEntry(SelectionDAG &DAG, const SDLoc &dl, SDValue GA) const;
1250 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
1251 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
1252 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
1253 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
1254 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
1255 SDValue LowerGlobalTLSAddressAIX(SDValue Op, SelectionDAG &DAG) const;
1256 SDValue LowerGlobalTLSAddressLinux(SDValue Op, SelectionDAG &DAG) const;
1257 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
1258 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
1259 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
1260 SDValue LowerINIT_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const;
1261 SDValue LowerADJUST_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const;
1262 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
1263 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
1264 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const;
1265 SDValue LowerVACOPY(SDValue Op, SelectionDAG &DAG) const;
1266 SDValue LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const;
1267 SDValue LowerGET_DYNAMIC_AREA_OFFSET(SDValue Op, SelectionDAG &DAG) const;
1268 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
1269 SDValue LowerEH_DWARF_CFA(SDValue Op, SelectionDAG &DAG) const;
1270 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
1271 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
1272 SDValue LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const;
1273 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
1274 SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
1276 SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
1277 SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const;
1278 SDValue LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const;
1279 SDValue LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const;
1280 SDValue LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const;
1281 SDValue LowerFunnelShift(SDValue Op, SelectionDAG &DAG) const;
1282 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
1283 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
1284 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
1285 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
1286 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
1287 SDValue LowerBSWAP(SDValue Op, SelectionDAG &DAG) const;
1288 SDValue LowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const;
1289 SDValue lowerToLibCall(const char *LibCallName, SDValue Op,
1291 SDValue lowerLibCallBasedOnType(const char *LibCallFloatName,
1292 const char *LibCallDoubleName, SDValue Op,
1294 bool isLowringToMASSFiniteSafe(SDValue Op) const;
1295 bool isLowringToMASSSafe(SDValue Op) const;
1297 SDValue lowerLibCallBase(const char *LibCallDoubleName,
1300 const char *LibCallFloatNameFinite, SDValue Op,
1302 SDValue lowerPow(SDValue Op, SelectionDAG &DAG) const;
1303 SDValue lowerSin(SDValue Op, SelectionDAG &DAG) const;
1304 SDValue lowerCos(SDValue Op, SelectionDAG &DAG) const;
1305 SDValue lowerLog(SDValue Op, SelectionDAG &DAG) const;
1306 SDValue lowerLog10(SDValue Op, SelectionDAG &DAG) const;
1307 SDValue lowerExp(SDValue Op, SelectionDAG &DAG) const;
1308 SDValue LowerATOMIC_LOAD_STORE(SDValue Op, SelectionDAG &DAG) const;
1309 SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;
1310 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
1311 SDValue LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const;
1312 SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;
1313 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
1315 SDValue LowerVectorLoad(SDValue Op, SelectionDAG &DAG) const;
1316 SDValue LowerVectorStore(SDValue Op, SelectionDAG &DAG) const;
1318 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
1322 SmallVectorImpl<SDValue> &InVals) const;
1324 SDValue FinishCall(CallFlags CFlags, const SDLoc &dl, SelectionDAG &DAG,
1325 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
1326 SDValue InFlag, SDValue Chain, SDValue CallSeqStart,
1327 SDValue &Callee, int SPDiff, unsigned NumBytes,
1329 SmallVectorImpl<SDValue> &InVals,
1332 SDValue
1333 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1336 SmallVectorImpl<SDValue> &InVals) const override;
1338 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
1339 SmallVectorImpl<SDValue> &InVals) const override;
1346 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1348 const SmallVectorImpl<SDValue> &OutVals,
1351 SDValue extendArgForPPC64(ISD::ArgFlagsTy Flags, EVT ObjectVT,
1352 SelectionDAG &DAG, SDValue ArgVal,
1355 SDValue LowerFormalArguments_AIX(
1356 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1358 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const;
1359 SDValue LowerFormalArguments_64SVR4(
1360 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1362 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const;
1363 SDValue LowerFormalArguments_32SVR4(
1364 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1366 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const;
1368 SDValue createMemcpyOutsideCallSeq(SDValue Arg, SDValue PtrOff,
1369 SDValue CallSeqStart,
1373 SDValue LowerCall_64SVR4(SDValue Chain, SDValue Callee, CallFlags CFlags,
1375 const SmallVectorImpl<SDValue> &OutVals,
1378 SmallVectorImpl<SDValue> &InVals,
1380 SDValue LowerCall_32SVR4(SDValue Chain, SDValue Callee, CallFlags CFlags,
1382 const SmallVectorImpl<SDValue> &OutVals,
1385 SmallVectorImpl<SDValue> &InVals,
1387 SDValue LowerCall_AIX(SDValue Chain, SDValue Callee, CallFlags CFlags,
1389 const SmallVectorImpl<SDValue> &OutVals,
1392 SmallVectorImpl<SDValue> &InVals,
1395 SDValue lowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const;
1396 SDValue lowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const;
1397 SDValue LowerBITCAST(SDValue Op, SelectionDAG &DAG) const;
1399 SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const;
1400 SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const;
1401 SDValue DAGCombineTruncBoolExt(SDNode *N, DAGCombinerInfo &DCI) const;
1402 SDValue combineStoreFPToInt(SDNode *N, DAGCombinerInfo &DCI) const;
1403 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const;
1404 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const;
1405 SDValue combineSRA(SDNode *N, DAGCombinerInfo &DCI) const;
1406 SDValue combineSRL(SDNode *N, DAGCombinerInfo &DCI) const;
1407 SDValue combineMUL(SDNode *N, DAGCombinerInfo &DCI) const;
1408 SDValue combineADD(SDNode *N, DAGCombinerInfo &DCI) const;
1409 SDValue combineFMALike(SDNode *N, DAGCombinerInfo &DCI) const;
1410 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const;
1411 SDValue combineSetCC(SDNode *N, DAGCombinerInfo &DCI) const;
1412 SDValue combineABS(SDNode *N, DAGCombinerInfo &DCI) const;
1413 SDValue combineVSelect(SDNode *N, DAGCombinerInfo &DCI) const;
1414 SDValue combineVectorShuffle(ShuffleVectorSDNode *SVN,
1416 SDValue combineVReverseMemOP(ShuffleVectorSDNode *SVN, LSBaseSDNode *LSBase,
1422 SDValue ConvertSETCCToSubtract(SDNode *N, DAGCombinerInfo &DCI) const;
1424 SDValue getSqrtEstimate(SDValue Operand, SelectionDAG &DAG, int Enabled,
1427 SDValue getRecipEstimate(SDValue Operand, SelectionDAG &DAG, int Enabled,
1429 SDValue getSqrtInputTest(SDValue Operand, SelectionDAG &DAG,
1431 SDValue getSqrtResultForDenormInput(SDValue Operand,
1435 SDValue
1443 SDValue lowerToVINSERTH(ShuffleVectorSDNode *N, SelectionDAG &DAG) const;
1448 SDValue lowerToVINSERTB(ShuffleVectorSDNode *N, SelectionDAG &DAG) const;
1452 SDValue lowerToXXSPLTI32DX(ShuffleVectorSDNode *N, SelectionDAG &DAG) const;
1469 unsigned computeMOFlags(const SDNode *Parent, SDValue N,
1481 bool isIntS16Immediate(SDValue Op, int16_t &Imm);
1483 bool isIntS34Immediate(SDValue Op, int64_t &Imm);