5487   const bool IsPPC64 = Subtarget.isPPC64();  in buildCallOperands()  local
5489   const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32;  in buildCallOperands()
5527       Ops.push_back(DAG.getRegister(IsPPC64 ? PPC::CTR8 : PPC::CTR, RegVT));  in buildCallOperands()
6588   const bool IsPPC64 = Subtarget.isPPC64();  in CC_AIX()  local
6589   const Align PtrAlign = IsPPC64 ? Align(8) : Align(4);  in CC_AIX()
6590   const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32;  in CC_AIX()
6630       if (unsigned Reg = State.AllocateReg(IsPPC64 ? GPR_64 : GPR_32))  in CC_AIX()
6648     assert(IsPPC64 && "PPC32 should have split i64 values.");  in CC_AIX()
6657     if (unsigned Reg = State.AllocateReg(IsPPC64 ? GPR_64 : GPR_32))  in CC_AIX()
6671         State.AllocateStack(IsPPC64 ? 8 : StoreSize, Align(4));  in CC_AIX()
6678       if (unsigned Reg = State.AllocateReg(IsPPC64 ? GPR_64 : GPR_32)) {  in CC_AIX()
6730     const unsigned PtrSize = IsPPC64 ? 8 : 4;  in CC_AIX()
6731     ArrayRef<MCPhysReg> GPRs = IsPPC64 ? GPR_64 : GPR_32;  in CC_AIX()
6811                                                     bool IsPPC64,  in getRegClassForSVT()  argument
6814   assert((IsPPC64 || SVT != MVT::i64) &&  in getRegClassForSVT()
6823     return IsPPC64 ? &PPC::G8RCRegClass : &PPC::GPRCRegClass;  in getRegClassForSVT()
6930   const bool IsPPC64 = Subtarget.isPPC64();  in LowerFormalArguments_AIX()  local
6931   const unsigned PtrByteSize = IsPPC64 ? 8 : 4;  in LowerFormalArguments_AIX()
7003                      getRegClassForSVT(SVT, IsPPC64, Subtarget.hasP8Vector(),  in LowerFormalArguments_AIX()
7017         assert(!IsPPC64 &&  in LowerFormalArguments_AIX()
7094           IsPPC64 ? &PPC::G8RCRegClass : &PPC::GPRCRegClass;  in LowerFormalArguments_AIX()
7145                        getRegClassForSVT(SVT, IsPPC64, Subtarget.hasP8Vector(),  in LowerFormalArguments_AIX()
7186     const unsigned NumGPArgRegs = array_lengthof(IsPPC64 ? GPR_64 : GPR_32);  in LowerFormalArguments_AIX()
7196           IsPPC64 ? MF.addLiveIn(GPR_64[GPRIndex], &PPC::G8RCRegClass)  in LowerFormalArguments_AIX()
7245   const bool IsPPC64 = Subtarget.isPPC64();  in LowerCall_AIX()  local
7247   const unsigned PtrByteSize = IsPPC64 ? 8 : 4;  in LowerCall_AIX()
7272   const SDValue StackPtr = IsPPC64 ? DAG.getRegister(PPC::X1, MVT::i64)  in LowerCall_AIX()
7434         assert(!IsPPC64 &&  in LowerCall_AIX()
7478       assert(Arg.getValueType() == MVT::f64 && CFlags.IsVarArg && !IsPPC64 &&  in LowerCall_AIX()