Lines Matching refs:INSERT_VECTOR_ELT

848       setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Expand);  in PPCTargetLowering()
931       setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f64, Custom);  in PPCTargetLowering()
1179       setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);  in PPCTargetLowering()
1180       setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);  in PPCTargetLowering()
1281         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i64, Legal);  in PPCTargetLowering()
1282         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Legal);  in PPCTargetLowering()
1283         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Legal);  in PPCTargetLowering()
1284         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Legal);  in PPCTargetLowering()
1286         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);  in PPCTargetLowering()
1287         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Custom);  in PPCTargetLowering()
10830   assert(Op.getOpcode() == ISD::INSERT_VECTOR_ELT &&  in LowerINSERT_VECTOR_ELT()
10857           DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v4i32, BitcastVector,  in LowerINSERT_VECTOR_ELT()
11197   case ISD::INSERT_VECTOR_ELT:  return LowerINSERT_VECTOR_ELT(Op, DAG);  in LowerOperation()