Lines Matching refs:InstCnt
929 uint64_t Imm, unsigned &InstCnt) { in selectI64ImmDirect() argument
944 InstCnt = 1; in selectI64ImmDirect()
958 InstCnt = 2; in selectI64ImmDirect()
1068 InstCnt = 3; in selectI64ImmDirect()
1148 InstCnt = 0; in selectI64ImmDirect()
1158 uint64_t Imm, unsigned &InstCnt) { in selectI64ImmDirectPrefix() argument
1175 InstCnt = 1; in selectI64ImmDirectPrefix()
1184 InstCnt = 2; in selectI64ImmDirectPrefix()
1265 InstCnt = 3; in selectI64ImmDirectPrefix()
1278 unsigned *InstCnt = nullptr) { in selectI64Imm() argument
1299 if (InstCnt) in selectI64Imm()
1300 *InstCnt = InstCntDirectP; in selectI64Imm()
1306 if (InstCnt) in selectI64Imm()
1307 *InstCnt = InstCntDirect; in selectI64Imm()
1327 if (InstCnt) in selectI64Imm()
1328 *InstCnt = InstCntDirect; in selectI64Imm()
1997 void SelectAndParts32(const SDLoc &dl, SDValue &Res, unsigned *InstCnt) { in SelectAndParts32() argument
2047 if (InstCnt) *InstCnt += NumAndInsts; in SelectAndParts32()
2095 SDNode *Select32(SDNode *N, bool LateMask, unsigned *InstCnt) { in Select32() argument
2099 if (InstCnt) *InstCnt = 0; in Select32()
2102 SelectAndParts32(dl, Res, InstCnt); in Select32()
2110 if (InstCnt) *InstCnt += 1; in Select32()
2126 if (InstCnt) *InstCnt += BitGroups.size(); in Select32()
2152 if (InstCnt) *InstCnt += (unsigned) (ANDIMask != 0) + in Select32()
2201 unsigned *InstCnt = nullptr) { in SelectRotMask64() argument
2207 if (InstCnt) *InstCnt += 1; in SelectRotMask64()
2249 if (InstCnt) *InstCnt += 1; in SelectRotMask64()
2265 unsigned MaskEnd, unsigned *InstCnt = nullptr) { in SelectRotMaskIns64() argument
2271 if (InstCnt) *InstCnt += 1; in SelectRotMaskIns64()
2299 if (InstCnt) *InstCnt += 1; in SelectRotMaskIns64()
2311 void SelectAndParts64(const SDLoc &dl, SDValue &Res, unsigned *InstCnt) { in SelectAndParts64() argument
2421 if (InstCnt) *InstCnt += NumAndInsts; in SelectAndParts64()
2481 SDNode *Select64(SDNode *N, bool LateMask, unsigned *InstCnt) { in Select64() argument
2485 if (InstCnt) *InstCnt = 0; in Select64()
2488 SelectAndParts64(dl, Res, InstCnt); in Select64()
2530 InstCnt); in Select64()
2564 BG.EndIdx, InstCnt); in Select64()
2567 BG.StartIdx, BG.EndIdx, InstCnt); in Select64()
2585 if (InstCnt) *InstCnt += (unsigned) (ANDIMask != 0) + in Select64()
2616 if (InstCnt) in Select64()
2617 *InstCnt += NumOfSelectInsts + /* and */ 1; in Select64()
2624 SDNode *Select(SDNode *N, bool LateMask, unsigned *InstCnt = nullptr) { in Select() argument
2638 return Select32(N, LateMask, InstCnt); in Select()
2641 return Select64(N, LateMask, InstCnt); in Select()
2696 unsigned InstCnt = 0, InstCntLateMask = 0; in Select() local
2698 SDNode *RN = Select(N, false, &InstCnt); in Select()
2699 LLVM_DEBUG(dbgs() << "\t\tisel would use " << InstCnt << " instructions\n"); in Select()
2706 if (InstCnt <= InstCntLateMask) { in Select()