91 int NVPTXTargetLowering::getDivF32Level() const {  in getDivF32Level()
104 bool NVPTXTargetLowering::usePrecSqrtF32() const {  in usePrecSqrtF32()
114 bool NVPTXTargetLowering::useF32FTZ(const MachineFunction &MF) const {  in useF32FTZ()
362 NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM,  in NVPTXTargetLowering()  function in NVPTXTargetLowering
630 const char *NVPTXTargetLowering::getTargetNodeName(unsigned Opcode) const {  in getTargetNodeName()
1231 NVPTXTargetLowering::getPreferredVectorAction(MVT VT) const {  in getPreferredVectorAction()
1240 SDValue NVPTXTargetLowering::getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,  in getSqrtEstimate()
1290 NVPTXTargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {  in LowerGlobalAddress()
1298 std::string NVPTXTargetLowering::getPrototype(  in getPrototype()
1410 Align NVPTXTargetLowering::getArgumentAlignment(SDValue Callee,  in getArgumentAlignment()
1463 SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,  in LowerCall()
1929 NVPTXTargetLowering::LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const {  in LowerCONCAT_VECTORS()
1957 SDValue NVPTXTargetLowering::LowerBUILD_VECTOR(SDValue Op,  in LowerBUILD_VECTOR()
1974 SDValue NVPTXTargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,  in LowerEXTRACT_VECTOR_ELT()
2001 SDValue NVPTXTargetLowering::LowerShiftRightParts(SDValue Op,  in LowerShiftRightParts()
2062 SDValue NVPTXTargetLowering::LowerShiftLeftParts(SDValue Op,  in LowerShiftLeftParts()
2117 SDValue NVPTXTargetLowering::LowerFROUND(SDValue Op, SelectionDAG &DAG) const {  in LowerFROUND()
2136 SDValue NVPTXTargetLowering::LowerFROUND32(SDValue Op,  in LowerFROUND32()
2177 SDValue NVPTXTargetLowering::LowerFROUND64(SDValue Op,  in LowerFROUND64()
2212 NVPTXTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {  in LowerOperation()
2248 SDValue NVPTXTargetLowering::LowerSelect(SDValue Op, SelectionDAG &DAG) const {  in LowerSelect()
2264 SDValue NVPTXTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {  in LowerLOAD()
2288 SDValue NVPTXTargetLowering::LowerLOADi1(SDValue Op, SelectionDAG &DAG) const {  in LowerLOADi1()
2306 SDValue NVPTXTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {  in LowerSTORE()
2327 NVPTXTargetLowering::LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const {  in LowerSTOREVector()
2450 SDValue NVPTXTargetLowering::LowerSTOREi1(SDValue Op, SelectionDAG &DAG) const {  in LowerSTOREi1()
2466 NVPTXTargetLowering::getParamSymbol(SelectionDAG &DAG, int idx, EVT v) const {  in getParamSymbol()
2478 SDValue NVPTXTargetLowering::LowerFormalArguments(  in LowerFormalArguments()
2671 NVPTXTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,  in LowerReturn()
2774 void NVPTXTargetLowering::LowerAsmOperandForConstraint(  in LowerAsmOperandForConstraint()
3484 bool NVPTXTargetLowering::getTgtMemIntrinsic(  in getTgtMemIntrinsic()
4338 Align NVPTXTargetLowering::getFunctionParamOptimizedAlign(  in getFunctionParamOptimizedAlign()
4356 bool NVPTXTargetLowering::isLegalAddressingMode(const DataLayout &DL,  in isLegalAddressingMode()
4393 NVPTXTargetLowering::ConstraintType
4394 NVPTXTargetLowering::getConstraintType(StringRef Constraint) const {  in getConstraintType()
4415 NVPTXTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,  in getRegForInlineAsmConstraint()
4444 bool NVPTXTargetLowering::allowFMA(MachineFunction &MF,  in allowFMA()
4461 bool NVPTXTargetLowering::allowUnsafeFPMath(MachineFunction &MF) const {  in allowUnsafeFPMath()
4503       const auto *TLI = static_cast<const NVPTXTargetLowering *>(  in PerformADDCombineWithOperands()
4894 SDValue NVPTXTargetLowering::PerformDAGCombine(SDNode *N,  in PerformDAGCombine()
5189 void NVPTXTargetLowering::ReplaceNodeResults(  in ReplaceNodeResults()
5203 NVPTXTargetLowering::AtomicExpansionKind
5204 NVPTXTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {  in shouldExpandAtomicRMWInIR()