Lines Matching refs:Ws

2664   SDValue Ws;  in lowerVECTOR_SHUFFLE_ILVEV()  local
2680 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVEV()
2682 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVEV()
2686 return DAG.getNode(MipsISD::ILVEV, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVEV()
2710 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVOD() local
2726 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVOD()
2728 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVOD()
2732 return DAG.getNode(MipsISD::ILVOD, SDLoc(Op), ResTy, Wt, Ws); in lowerVECTOR_SHUFFLE_ILVOD()
2757 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVR() local
2773 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVR()
2775 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVR()
2779 return DAG.getNode(MipsISD::ILVR, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVR()
2805 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVL() local
2821 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVL()
2824 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVL()
2828 return DAG.getNode(MipsISD::ILVL, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVL()
2852 SDValue Ws; in lowerVECTOR_SHUFFLE_PCKEV() local
2865 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_PCKEV()
2867 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_PCKEV()
2871 return DAG.getNode(MipsISD::PCKEV, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_PCKEV()
2895 SDValue Ws; in lowerVECTOR_SHUFFLE_PCKOD() local
2908 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_PCKOD()
2910 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_PCKOD()
2914 return DAG.getNode(MipsISD::PCKOD, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_PCKOD()
3166 Register Ws = MI.getOperand(1).getReg(); in emitCOPY_FW() local
3170 unsigned Wt = Ws; in emitCOPY_FW()
3176 BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Wt).addReg(Ws); in emitCOPY_FW()
3185 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wt).addReg(Ws).addImm(Lane); in emitCOPY_FW()
3211 Register Ws = MI.getOperand(1).getReg(); in emitCOPY_FD() local
3216 BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Fd).addReg(Ws, 0, Mips::sub_64); in emitCOPY_FD()
3220 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_D), Wt).addReg(Ws).addImm(1); in emitCOPY_FD()
3505 Register Ws = MI.getOperand(0).getReg(); in emitST_F16_PSEUDO() local
3520 BuildMI(*BB, MI, DL, TII->get(Mips::COPY_U_H), Rs).addReg(Ws).addImm(0); in emitST_F16_PSEUDO()
3760 Register Ws = MI.getOperand(1).getReg(); in emitFPEXTEND_PSEUDO() local
3773 BuildMI(*BB, MI, DL, TII->get(Mips::FEXUPR_W), Wtemp).addReg(Ws); in emitFPEXTEND_PSEUDO()