Lines Matching refs:GPR32RegClass

68   addRegisterClass(MVT::i32, &Mips::GPR32RegClass);  in MipsSETargetLowering()
3029   const TargetRegisterClass *RC = &Mips::GPR32RegClass;  in emitBPOSGE32()
3098   const TargetRegisterClass *RC = &Mips::GPR32RegClass;  in emitMSACBranchPseudo()
3330       Subtarget.isABI_N64() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitINSERT_DF_VIDX()
3515                                : (Subtarget.isABI_O32() ? &Mips::GPR32RegClass  in emitST_F16_PSEUDO()
3517   const bool UsingMips32 = RC == &Mips::GPR32RegClass;  in emitST_F16_PSEUDO()
3518   Register Rs = RegInfo.createVirtualRegister(&Mips::GPR32RegClass);  in emitST_F16_PSEUDO()
3567                                : (Subtarget.isABI_O32() ? &Mips::GPR32RegClass  in emitLD_F16_PSEUDO()
3570   const bool UsingMips32 = RC == &Mips::GPR32RegClass;  in emitLD_F16_PSEUDO()
3579     Register Tmp = RegInfo.createVirtualRegister(&Mips::GPR32RegClass);  in emitLD_F16_PSEUDO()
3660       IsFGR64onMips64 ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitFPROUND_PSEUDO()
3764       IsFGR64onMips64 ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitFPEXTEND_PSEUDO()