Lines Matching refs:GPR32RegClass

4136         return std::make_pair(0U, &Mips::GPR32RegClass);  in getRegForInlineAsmConstraint()
4139 return std::make_pair(0U, &Mips::GPR32RegClass); in getRegForInlineAsmConstraint()
4163 return std::make_pair((unsigned)Mips::T9, &Mips::GPR32RegClass); in getRegForInlineAsmConstraint()
4781 Register Temp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4790 Register LoadHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4791 Register LoadFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4792 Register Undef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4836 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4837 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4855 Register LoHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4856 Register LoFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4857 Register LoUndef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4858 Register HiHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4859 Register HiFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4860 Register HiUndef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4912 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_W()
4925 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_W()
4977 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
4978 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
5003 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
5004 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()