Lines Matching refs:Mips
84 unsigned ZERO = Mips::ZERO; in expandAtomicCmpSwapSubword()
85 unsigned BNE = Mips::BNE; in expandAtomicCmpSwapSubword()
86 unsigned BEQ = Mips::BEQ; in expandAtomicCmpSwapSubword()
88 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I8_POSTRA ? Mips::SEB : Mips::SEH; in expandAtomicCmpSwapSubword()
91 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwapSubword()
92 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwapSubword()
93 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword()
94 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwapSubword()
96 LL = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicCmpSwapSubword()
97 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in expandAtomicCmpSwapSubword()
98 SC = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicCmpSwapSubword()
99 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in expandAtomicCmpSwapSubword()
146 BuildMI(loop1MBB, DL, TII->get(Mips::AND), Scratch2) in expandAtomicCmpSwapSubword()
157 BuildMI(loop2MBB, DL, TII->get(Mips::AND), Scratch) in expandAtomicCmpSwapSubword()
160 BuildMI(loop2MBB, DL, TII->get(Mips::OR), Scratch) in expandAtomicCmpSwapSubword()
175 BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest) in expandAtomicCmpSwapSubword()
182 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I16_POSTRA ? 16 : 24; in expandAtomicCmpSwapSubword()
183 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicCmpSwapSubword()
186 BuildMI(sinkMBB, DL, TII->get(Mips::SRA), Dest) in expandAtomicCmpSwapSubword()
207 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I32_POSTRA ? 4 : 8; in expandAtomicCmpSwap()
217 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwap()
218 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwap()
219 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap()
220 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwap()
223 ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicCmpSwap()
224 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in expandAtomicCmpSwap()
226 ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicCmpSwap()
227 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in expandAtomicCmpSwap()
228 BNE = Mips::BNE; in expandAtomicCmpSwap()
229 BEQ = Mips::BEQ; in expandAtomicCmpSwap()
232 ZERO = Mips::ZERO; in expandAtomicCmpSwap()
233 MOVE = Mips::OR; in expandAtomicCmpSwap()
235 LL = STI->hasMips64r6() ? Mips::LLD_R6 : Mips::LLD; in expandAtomicCmpSwap()
236 SC = STI->hasMips64r6() ? Mips::SCD_R6 : Mips::SCD; in expandAtomicCmpSwap()
237 ZERO = Mips::ZERO_64; in expandAtomicCmpSwap()
238 BNE = Mips::BNE64; in expandAtomicCmpSwap()
239 BEQ = Mips::BEQ64; in expandAtomicCmpSwap()
240 MOVE = Mips::OR64; in expandAtomicCmpSwap()
312 unsigned BEQ = Mips::BEQ; in expandAtomicBinOpSubword()
313 unsigned SEOp = Mips::SEH; in expandAtomicBinOpSubword()
316 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicBinOpSubword()
317 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicBinOpSubword()
318 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicBinOpSubword()
319 SLT = Mips::SLT_MM; in expandAtomicBinOpSubword()
320 SLTu = Mips::SLTu_MM; in expandAtomicBinOpSubword()
321 OR = STI->hasMips32r6() ? Mips::OR_MMR6 : Mips::OR_MM; in expandAtomicBinOpSubword()
322 MOVN = Mips::MOVN_I_MM; in expandAtomicBinOpSubword()
323 MOVZ = Mips::MOVZ_I_MM; in expandAtomicBinOpSubword()
324 SELNEZ = STI->hasMips32r6() ? Mips::SELNEZ_MMR6 : Mips::SELNEZ; in expandAtomicBinOpSubword()
325 SELEQZ = STI->hasMips32r6() ? Mips::SELEQZ_MMR6 : Mips::SELEQZ; in expandAtomicBinOpSubword()
327 LL = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicBinOpSubword()
328 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in expandAtomicBinOpSubword()
329 SC = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicBinOpSubword()
330 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in expandAtomicBinOpSubword()
331 SLT = Mips::SLT; in expandAtomicBinOpSubword()
332 SLTu = Mips::SLTu; in expandAtomicBinOpSubword()
333 OR = Mips::OR; in expandAtomicBinOpSubword()
334 MOVN = Mips::MOVN_I_I; in expandAtomicBinOpSubword()
335 MOVZ = Mips::MOVZ_I_I; in expandAtomicBinOpSubword()
336 SELNEZ = Mips::SELNEZ; in expandAtomicBinOpSubword()
337 SELEQZ = Mips::SELEQZ; in expandAtomicBinOpSubword()
348 case Mips::ATOMIC_LOAD_NAND_I8_POSTRA: in expandAtomicBinOpSubword()
349 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
351 case Mips::ATOMIC_LOAD_NAND_I16_POSTRA: in expandAtomicBinOpSubword()
354 case Mips::ATOMIC_SWAP_I8_POSTRA: in expandAtomicBinOpSubword()
355 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
357 case Mips::ATOMIC_SWAP_I16_POSTRA: in expandAtomicBinOpSubword()
360 case Mips::ATOMIC_LOAD_ADD_I8_POSTRA: in expandAtomicBinOpSubword()
361 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
363 case Mips::ATOMIC_LOAD_ADD_I16_POSTRA: in expandAtomicBinOpSubword()
364 Opcode = Mips::ADDu; in expandAtomicBinOpSubword()
366 case Mips::ATOMIC_LOAD_SUB_I8_POSTRA: in expandAtomicBinOpSubword()
367 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
369 case Mips::ATOMIC_LOAD_SUB_I16_POSTRA: in expandAtomicBinOpSubword()
370 Opcode = Mips::SUBu; in expandAtomicBinOpSubword()
372 case Mips::ATOMIC_LOAD_AND_I8_POSTRA: in expandAtomicBinOpSubword()
373 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
375 case Mips::ATOMIC_LOAD_AND_I16_POSTRA: in expandAtomicBinOpSubword()
376 Opcode = Mips::AND; in expandAtomicBinOpSubword()
378 case Mips::ATOMIC_LOAD_OR_I8_POSTRA: in expandAtomicBinOpSubword()
379 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
381 case Mips::ATOMIC_LOAD_OR_I16_POSTRA: in expandAtomicBinOpSubword()
382 Opcode = Mips::OR; in expandAtomicBinOpSubword()
384 case Mips::ATOMIC_LOAD_XOR_I8_POSTRA: in expandAtomicBinOpSubword()
385 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
387 case Mips::ATOMIC_LOAD_XOR_I16_POSTRA: in expandAtomicBinOpSubword()
388 Opcode = Mips::XOR; in expandAtomicBinOpSubword()
390 case Mips::ATOMIC_LOAD_UMIN_I8_POSTRA: in expandAtomicBinOpSubword()
391 case Mips::ATOMIC_LOAD_UMIN_I16_POSTRA: in expandAtomicBinOpSubword()
394 case Mips::ATOMIC_LOAD_MIN_I8_POSTRA: in expandAtomicBinOpSubword()
395 case Mips::ATOMIC_LOAD_MIN_I16_POSTRA: in expandAtomicBinOpSubword()
398 case Mips::ATOMIC_LOAD_UMAX_I8_POSTRA: in expandAtomicBinOpSubword()
399 case Mips::ATOMIC_LOAD_UMAX_I16_POSTRA: in expandAtomicBinOpSubword()
402 case Mips::ATOMIC_LOAD_MAX_I8_POSTRA: in expandAtomicBinOpSubword()
403 case Mips::ATOMIC_LOAD_MAX_I16_POSTRA: in expandAtomicBinOpSubword()
442 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
445 BuildMI(loopMBB, DL, TII->get(Mips::NOR), BinOpRes) in expandAtomicBinOpSubword()
446 .addReg(Mips::ZERO) in expandAtomicBinOpSubword()
448 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
466 BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal) in expandAtomicBinOpSubword()
469 BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr).addReg(Incr).addReg(Mask); in expandAtomicBinOpSubword()
501 .addReg(Mips::ZERO); in expandAtomicBinOpSubword()
509 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
519 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
524 BuildMI(loopMBB, DL, TII->get(Mips::AND), BinOpRes) in expandAtomicBinOpSubword()
533 BuildMI(loopMBB, DL, TII->get(Mips::AND), StoreVal) in expandAtomicBinOpSubword()
535 BuildMI(loopMBB, DL, TII->get(Mips::OR), StoreVal) in expandAtomicBinOpSubword()
540 .addReg(StoreVal).addReg(Mips::ZERO).addMBB(loopMBB); in expandAtomicBinOpSubword()
549 BuildMI(sinkMBB, DL, TII->get(Mips::AND), Dest) in expandAtomicBinOpSubword()
551 BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest) in expandAtomicBinOpSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword()
558 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicBinOpSubword()
561 BuildMI(sinkMBB, DL, TII->get(Mips::SRA), Dest) in expandAtomicBinOpSubword()
590 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicBinOp()
591 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicBinOp()
592 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicBinOp()
593 SLT = Mips::SLT_MM; in expandAtomicBinOp()
594 SLTu = Mips::SLTu_MM; in expandAtomicBinOp()
595 OR = STI->hasMips32r6() ? Mips::OR_MMR6 : Mips::OR_MM; in expandAtomicBinOp()
596 MOVN = Mips::MOVN_I_MM; in expandAtomicBinOp()
597 MOVZ = Mips::MOVZ_I_MM; in expandAtomicBinOp()
598 SELNEZ = STI->hasMips32r6() ? Mips::SELNEZ_MMR6 : Mips::SELNEZ; in expandAtomicBinOp()
599 SELEQZ = STI->hasMips32r6() ? Mips::SELEQZ_MMR6 : Mips::SELEQZ; in expandAtomicBinOp()
602 ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicBinOp()
603 : (ArePtrs64bit ? Mips::LL64 : Mips::LL); in expandAtomicBinOp()
605 ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicBinOp()
606 : (ArePtrs64bit ? Mips::SC64 : Mips::SC); in expandAtomicBinOp()
607 BEQ = Mips::BEQ; in expandAtomicBinOp()
608 SLT = Mips::SLT; in expandAtomicBinOp()
609 SLTu = Mips::SLTu; in expandAtomicBinOp()
610 OR = Mips::OR; in expandAtomicBinOp()
611 MOVN = Mips::MOVN_I_I; in expandAtomicBinOp()
612 MOVZ = Mips::MOVZ_I_I; in expandAtomicBinOp()
613 SELNEZ = Mips::SELNEZ; in expandAtomicBinOp()
614 SELEQZ = Mips::SELEQZ; in expandAtomicBinOp()
617 ZERO = Mips::ZERO; in expandAtomicBinOp()
619 LL = STI->hasMips64r6() ? Mips::LLD_R6 : Mips::LLD; in expandAtomicBinOp()
620 SC = STI->hasMips64r6() ? Mips::SCD_R6 : Mips::SCD; in expandAtomicBinOp()
621 ZERO = Mips::ZERO_64; in expandAtomicBinOp()
622 BEQ = Mips::BEQ64; in expandAtomicBinOp()
623 SLT = Mips::SLT64; in expandAtomicBinOp()
624 SLTu = Mips::SLTu64; in expandAtomicBinOp()
625 OR = Mips::OR64; in expandAtomicBinOp()
626 MOVN = Mips::MOVN_I64_I64; in expandAtomicBinOp()
627 MOVZ = Mips::MOVZ_I64_I64; in expandAtomicBinOp()
628 SELNEZ = Mips::SELNEZ64; in expandAtomicBinOp()
629 SELEQZ = Mips::SELEQZ64; in expandAtomicBinOp()
648 case Mips::ATOMIC_LOAD_ADD_I32_POSTRA: in expandAtomicBinOp()
649 Opcode = Mips::ADDu; in expandAtomicBinOp()
651 case Mips::ATOMIC_LOAD_SUB_I32_POSTRA: in expandAtomicBinOp()
652 Opcode = Mips::SUBu; in expandAtomicBinOp()
654 case Mips::ATOMIC_LOAD_AND_I32_POSTRA: in expandAtomicBinOp()
655 Opcode = Mips::AND; in expandAtomicBinOp()
657 case Mips::ATOMIC_LOAD_OR_I32_POSTRA: in expandAtomicBinOp()
658 Opcode = Mips::OR; in expandAtomicBinOp()
660 case Mips::ATOMIC_LOAD_XOR_I32_POSTRA: in expandAtomicBinOp()
661 Opcode = Mips::XOR; in expandAtomicBinOp()
663 case Mips::ATOMIC_LOAD_NAND_I32_POSTRA: in expandAtomicBinOp()
665 AND = Mips::AND; in expandAtomicBinOp()
666 NOR = Mips::NOR; in expandAtomicBinOp()
668 case Mips::ATOMIC_SWAP_I32_POSTRA: in expandAtomicBinOp()
671 case Mips::ATOMIC_LOAD_ADD_I64_POSTRA: in expandAtomicBinOp()
672 Opcode = Mips::DADDu; in expandAtomicBinOp()
674 case Mips::ATOMIC_LOAD_SUB_I64_POSTRA: in expandAtomicBinOp()
675 Opcode = Mips::DSUBu; in expandAtomicBinOp()
677 case Mips::ATOMIC_LOAD_AND_I64_POSTRA: in expandAtomicBinOp()
678 Opcode = Mips::AND64; in expandAtomicBinOp()
680 case Mips::ATOMIC_LOAD_OR_I64_POSTRA: in expandAtomicBinOp()
681 Opcode = Mips::OR64; in expandAtomicBinOp()
683 case Mips::ATOMIC_LOAD_XOR_I64_POSTRA: in expandAtomicBinOp()
684 Opcode = Mips::XOR64; in expandAtomicBinOp()
686 case Mips::ATOMIC_LOAD_NAND_I64_POSTRA: in expandAtomicBinOp()
688 AND = Mips::AND64; in expandAtomicBinOp()
689 NOR = Mips::NOR64; in expandAtomicBinOp()
691 case Mips::ATOMIC_SWAP_I64_POSTRA: in expandAtomicBinOp()
694 case Mips::ATOMIC_LOAD_UMIN_I32_POSTRA: in expandAtomicBinOp()
695 case Mips::ATOMIC_LOAD_UMIN_I64_POSTRA: in expandAtomicBinOp()
698 case Mips::ATOMIC_LOAD_MIN_I32_POSTRA: in expandAtomicBinOp()
699 case Mips::ATOMIC_LOAD_MIN_I64_POSTRA: in expandAtomicBinOp()
702 case Mips::ATOMIC_LOAD_UMAX_I32_POSTRA: in expandAtomicBinOp()
703 case Mips::ATOMIC_LOAD_UMAX_I64_POSTRA: in expandAtomicBinOp()
706 case Mips::ATOMIC_LOAD_MAX_I32_POSTRA: in expandAtomicBinOp()
707 case Mips::ATOMIC_LOAD_MAX_I64_POSTRA: in expandAtomicBinOp()
740 (Size == 8) ? STI->getRegisterInfo()->getSubReg(Scratch2, Mips::sub_32) in expandAtomicBinOp()
823 case Mips::ATOMIC_CMP_SWAP_I32_POSTRA: in expandMI()
824 case Mips::ATOMIC_CMP_SWAP_I64_POSTRA: in expandMI()
826 case Mips::ATOMIC_CMP_SWAP_I8_POSTRA: in expandMI()
827 case Mips::ATOMIC_CMP_SWAP_I16_POSTRA: in expandMI()
829 case Mips::ATOMIC_SWAP_I8_POSTRA: in expandMI()
830 case Mips::ATOMIC_SWAP_I16_POSTRA: in expandMI()
831 case Mips::ATOMIC_LOAD_NAND_I8_POSTRA: in expandMI()
832 case Mips::ATOMIC_LOAD_NAND_I16_POSTRA: in expandMI()
833 case Mips::ATOMIC_LOAD_ADD_I8_POSTRA: in expandMI()
834 case Mips::ATOMIC_LOAD_ADD_I16_POSTRA: in expandMI()
835 case Mips::ATOMIC_LOAD_SUB_I8_POSTRA: in expandMI()
836 case Mips::ATOMIC_LOAD_SUB_I16_POSTRA: in expandMI()
837 case Mips::ATOMIC_LOAD_AND_I8_POSTRA: in expandMI()
838 case Mips::ATOMIC_LOAD_AND_I16_POSTRA: in expandMI()
839 case Mips::ATOMIC_LOAD_OR_I8_POSTRA: in expandMI()
840 case Mips::ATOMIC_LOAD_OR_I16_POSTRA: in expandMI()
841 case Mips::ATOMIC_LOAD_XOR_I8_POSTRA: in expandMI()
842 case Mips::ATOMIC_LOAD_XOR_I16_POSTRA: in expandMI()
843 case Mips::ATOMIC_LOAD_MIN_I8_POSTRA: in expandMI()
844 case Mips::ATOMIC_LOAD_MIN_I16_POSTRA: in expandMI()
845 case Mips::ATOMIC_LOAD_MAX_I8_POSTRA: in expandMI()
846 case Mips::ATOMIC_LOAD_MAX_I16_POSTRA: in expandMI()
847 case Mips::ATOMIC_LOAD_UMIN_I8_POSTRA: in expandMI()
848 case Mips::ATOMIC_LOAD_UMIN_I16_POSTRA: in expandMI()
849 case Mips::ATOMIC_LOAD_UMAX_I8_POSTRA: in expandMI()
850 case Mips::ATOMIC_LOAD_UMAX_I16_POSTRA: in expandMI()
852 case Mips::ATOMIC_LOAD_ADD_I32_POSTRA: in expandMI()
853 case Mips::ATOMIC_LOAD_SUB_I32_POSTRA: in expandMI()
854 case Mips::ATOMIC_LOAD_AND_I32_POSTRA: in expandMI()
855 case Mips::ATOMIC_LOAD_OR_I32_POSTRA: in expandMI()
856 case Mips::ATOMIC_LOAD_XOR_I32_POSTRA: in expandMI()
857 case Mips::ATOMIC_LOAD_NAND_I32_POSTRA: in expandMI()
858 case Mips::ATOMIC_SWAP_I32_POSTRA: in expandMI()
859 case Mips::ATOMIC_LOAD_MIN_I32_POSTRA: in expandMI()
860 case Mips::ATOMIC_LOAD_MAX_I32_POSTRA: in expandMI()
861 case Mips::ATOMIC_LOAD_UMIN_I32_POSTRA: in expandMI()
862 case Mips::ATOMIC_LOAD_UMAX_I32_POSTRA: in expandMI()
864 case Mips::ATOMIC_LOAD_ADD_I64_POSTRA: in expandMI()
865 case Mips::ATOMIC_LOAD_SUB_I64_POSTRA: in expandMI()
866 case Mips::ATOMIC_LOAD_AND_I64_POSTRA: in expandMI()
867 case Mips::ATOMIC_LOAD_OR_I64_POSTRA: in expandMI()
868 case Mips::ATOMIC_LOAD_XOR_I64_POSTRA: in expandMI()
869 case Mips::ATOMIC_LOAD_NAND_I64_POSTRA: in expandMI()
870 case Mips::ATOMIC_SWAP_I64_POSTRA: in expandMI()
871 case Mips::ATOMIC_LOAD_MIN_I64_POSTRA: in expandMI()
872 case Mips::ATOMIC_LOAD_MAX_I64_POSTRA: in expandMI()
873 case Mips::ATOMIC_LOAD_UMIN_I64_POSTRA: in expandMI()
874 case Mips::ATOMIC_LOAD_UMAX_I64_POSTRA: in expandMI()