Lines Matching refs:Mips
385 unsigned JR = ABI.IsN64() ? Mips::JR64 : Mips::JR; in buildProperJumpMI()
386 unsigned JIC = ABI.IsN64() ? Mips::JIC64 : Mips::JIC; in buildProperJumpMI()
387 unsigned JR_HB = ABI.IsN64() ? Mips::JR_HB64 : Mips::JR_HB; in buildProperJumpMI()
388 unsigned JR_HB_R6 = ABI.IsN64() ? Mips::JR_HB64_R6 : Mips::JR_HB_R6; in buildProperJumpMI()
396 if (JumpOp == Mips::JIC && STI->inMicroMipsMode()) in buildProperJumpMI()
397 JumpOp = Mips::JIC_MMR6; in buildProperJumpMI()
399 unsigned ATReg = ABI.IsN64() ? Mips::AT_64 : Mips::AT; in buildProperJumpMI()
435 ? STI->inMicroMipsMode() ? Mips::BALC_MMR6 : Mips::BALC in expandToLongBranch()
436 : STI->inMicroMipsMode() ? Mips::BAL_BR_MM : Mips::BAL_BR; in expandToLongBranch()
470 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
471 .addReg(Mips::SP) in expandToLongBranch()
473 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) in expandToLongBranch()
474 .addReg(Mips::RA) in expandToLongBranch()
475 .addReg(Mips::SP) in expandToLongBranch()
494 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
501 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) in expandToLongBranch()
502 .addReg(Mips::AT) in expandToLongBranch()
516 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
517 .addReg(Mips::RA) in expandToLongBranch()
518 .addReg(Mips::AT); in expandToLongBranch()
519 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
520 .addReg(Mips::SP) in expandToLongBranch()
531 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
532 .addReg(Mips::SP) in expandToLongBranch()
539 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
540 .addReg(Mips::SP) in expandToLongBranch()
593 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
594 .addReg(Mips::SP_64) in expandToLongBranch()
596 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD)) in expandToLongBranch()
597 .addReg(Mips::RA_64) in expandToLongBranch()
598 .addReg(Mips::SP_64) in expandToLongBranch()
600 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu), in expandToLongBranch()
601 Mips::AT_64) in expandToLongBranch()
602 .addReg(Mips::ZERO_64) in expandToLongBranch()
605 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
606 .addReg(Mips::AT_64) in expandToLongBranch()
612 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_DADDiu), Mips::AT_64) in expandToLongBranch()
613 .addReg(Mips::AT_64) in expandToLongBranch()
627 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64) in expandToLongBranch()
628 .addReg(Mips::RA_64) in expandToLongBranch()
629 .addReg(Mips::AT_64); in expandToLongBranch()
630 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64) in expandToLongBranch()
631 .addReg(Mips::SP_64) in expandToLongBranch()
637 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::DADDiu), in expandToLongBranch()
638 Mips::SP_64) in expandToLongBranch()
639 .addReg(Mips::SP_64) in expandToLongBranch()
642 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
643 .addReg(Mips::SP_64) in expandToLongBranch()
664 if (STI->hasMips32r6() && TII->isBranchOffsetInRange(Mips::BC, I.Offset)) { in expandToLongBranch()
671 TII->get(STI->inMicroMipsMode() ? Mips::BC_MMR6 : Mips::BC)) in expandToLongBranch()
680 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::J)).addMBB(TgtMBB); in expandToLongBranch()
689 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op_64), in expandToLongBranch()
690 Mips::AT_64) in expandToLongBranch()
692 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
693 Mips::AT_64) in expandToLongBranch()
694 .addReg(Mips::AT_64) in expandToLongBranch()
696 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
697 .addReg(Mips::AT_64) in expandToLongBranch()
699 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
700 Mips::AT_64) in expandToLongBranch()
701 .addReg(Mips::AT_64) in expandToLongBranch()
703 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
704 .addReg(Mips::AT_64) in expandToLongBranch()
706 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
707 Mips::AT_64) in expandToLongBranch()
708 .addReg(Mips::AT_64) in expandToLongBranch()
711 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op), in expandToLongBranch()
712 Mips::AT) in expandToLongBranch()
714 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_ADDiu2Op), in expandToLongBranch()
715 Mips::AT) in expandToLongBranch()
716 .addReg(Mips::AT) in expandToLongBranch()
737 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0) in emitGPDisp()
739 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0) in emitGPDisp()
740 .addReg(Mips::V0) in emitGPDisp()
742 MBB.removeLiveIn(Mips::V0); in emitGPDisp()
768 std::next(Iit)->getOpcode() != Mips::NOP) { in handleSlot()