197                                  MachineInstr *MI2 = nullptr,
398 static bool ConsecutiveInstr(MachineInstr *MI1, MachineInstr *MI2) {  in ConsecutiveInstr()  argument
403   if (!GetImm(MI2, 2, Offset2))  in ConsecutiveInstr()
407   Register Reg2 = MI2->getOperand(0).getReg();  in ConsecutiveInstr()
465   MachineInstr *MI2 = &*NextMII;  in ReduceXWtoXWP()  local
475   if (!CheckXWPInstr(MI2, ReduceToLwp, Entry))  in ReduceXWtoXWP()
479   Register Reg2 = MI2->getOperand(1).getReg();  in ReduceXWtoXWP()
484   bool ConsecutiveForward = ConsecutiveInstr(MI1, MI2);  in ReduceXWtoXWP()
485   bool ConsecutiveBackward = ConsecutiveInstr(MI2, MI1);  in ReduceXWtoXWP()
491   return ReplaceInstruction(MI1, Entry, MI2, ConsecutiveForward);  in ReduceXWtoXWP()
622   MachineInstr *MI2 = &*NextMII;  in ReduceMoveToMovep()  local
633   if (MI2->getOpcode() != Entry.WideOpc())  in ReduceMoveToMovep()
636   Register RegDstMI2 = MI2->getOperand(0).getReg();  in ReduceMoveToMovep()
637   Register RegSrcMI2 = MI2->getOperand(1).getReg();  in ReduceMoveToMovep()
651   return ReplaceInstruction(MI1, Entry, MI2, ConsecutiveForward);  in ReduceMoveToMovep()
695                                              MachineInstr *MI2,  in ReplaceInstruction()  argument
738         MIB.add(MI2->getOperand(0));  in ReplaceInstruction()
741           MIB.add(MI2->getOperand(1));  in ReplaceInstruction()
745         MIB.add(MI2->getOperand(0));  in ReplaceInstruction()
747         MIB.add(MI2->getOperand(1));  in ReplaceInstruction()
751           MIB.add(MI2->getOperand(2));  in ReplaceInstruction()
754       LLVM_DEBUG(dbgs() << "and converting 32-bit: " << *MI2  in ReplaceInstruction()
758       MBB.erase_instr(MI2);  in ReplaceInstruction()